IMXRT1052 SPDIF txClkSource tx_clk1 (from SAI1) not work

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

IMXRT1052 SPDIF txClkSource tx_clk1 (from SAI1) not work

跳至解决方案
1,415 次查看
vega_sdr
Contributor I

Hi !

With XTALOSC and SPDIF0_CLK_ROOT clock source SPDIF transmitter work fine.

But when I select spdif_config.txClkSource = 2U//txClk from SAI1 for SPDIF, SPDIF not work.

SAI1 clock source - audiopll or ext mclk, I see all clock and data on SAI1 pins.

0 项奖励
回复
1 解答
1,398 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @vega_sdr ,

   Seems my previous understanding is not correct. It is not the SAI ROOT clock, it is the sai rxbclk.

kerryzhou_0-1626846686077.png

kerryzhou_1-1626846700947.png

 

2 is the txclk1, from the above picture, it is the rxbclk.

So, do you check the RXBCLK, whether that have wave or not?

Best Regards,

kerry

 

在原帖中查看解决方案

0 项奖励
回复
6 回复数
1,391 次查看
vega_sdr
Contributor I

Thanks a lot !

My mistake was that I didn't activate synchronous mode for sai_rx (I2S_RCR2_SYNC bit), in my project I use only sai_tx.

 

0 项奖励
回复
1,386 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Thanks for your updated information.

So, if you don't use SAI rx, it's better your SPDIF still use the SPDIF clock source :SPDIF0_CLK_ROOT.

Best Regards,

Kerry

0 项奖励
回复
1,384 次查看
vega_sdr
Contributor I

SAI1 and SPDIF must use external clock, but on my pcb it traced only to SAI1_mclk pin.

0 项奖励
回复
1,406 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @vega_sdr 

  Do you configure the same sai1 clock to your SPDF0_CLK clock?

kerryzhou_0-1626835924686.png

I mean, set your SAI1 clock the same frequency to your working SPDIF0_CLK_ROOT, whether this method works or not?

You can use the mcuxpresso project, cfg tool to configure the clock directly to test it.

Best Regards,

Kerry

 

0 项奖励
回复
1,401 次查看
vega_sdr
Contributor I

I set same clockPLL4_MAIN_CLK for SAI1_CLK and for SPDF0_CLK.

SPDIF work  when spdif_config.txClkSource = 1 and not work when spdif_config.txClkSource = 2

0 项奖励
回复
1,399 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @vega_sdr ,

   Seems my previous understanding is not correct. It is not the SAI ROOT clock, it is the sai rxbclk.

kerryzhou_0-1626846686077.png

kerryzhou_1-1626846700947.png

 

2 is the txclk1, from the above picture, it is the rxbclk.

So, do you check the RXBCLK, whether that have wave or not?

Best Regards,

kerry

 

0 项奖励
回复