IMX RT 1024 capable of "RWW" when 2 flashes connected to FlexSPI?

[bp1979]

Dear NXP,

After a lot of struggles, I finally have the 1024 on our custom board working reliably with 2 flashes:

- internal flash (flash1) connected to FlexSPI port A1

- external flash (flash2) connected to FlexSPI port B1

Our application starts, and all functionality is working fine. I can read/write/program to flash2, when I disable all interrupts and do blocking transfers to flash2 while the FlexSPI code runs from ITC.

What does not work, is to try to read/erase/program to flash2, while the application (FreeRTOS) is executing from internal flash. 

Can you please confirm that the 1024 is indeed technically capable of executing from flash1, while the application is e.g. logging to flash2? 

This would require that we can send IP commands to FlexSPI, and do the following in parallel:

- wait for the IP commands to finish on flash2

- allow the processor to fetch new instructions from flash1

Both parallel actions will be using the same FlexSPI peripheral. The FlexSPI peripheral is controlling two different ports independently.

Is this possible? Is this possible with blocking transfers? 

[Omar_Anguiano · Accepted solution]

Hello

I hope you are well.

It is possible to have them both however as you stated is not possible to access flash2 while flash1 is being used.
This document can be helpful to achieve this as the RT1024 on-chip flash does not support RWW directly. Implement RWW on i.MX RT Series (nxp.com)

Best regards,
Omar