I2S Bidirectional communication via SAI2 in sln-local2-iot

Blackpearl · ‎04-12-2022

Hi All,

I want to configure SAI2 in sln-local2-iot which is connected to DMIC in evk board as an interface for the communication with the host processor as follows.

Pinmuxing is done as follows.

SAI2_TX_DATA - GPIO_AD_B0_09-Jtag TDI pin
SAI2_TX_BCLK - GPIO_AD_B0_05-Boot pin
SAI2_TX_SYNC - GPIO_AD_B0_04-Boot pin
SAI2_RX_DATA - GPIO_AD_B0_08 - DMIC pin

I Tried to record DMIC data from SAI1 using SLN_AMP_Write() in the host processor via SAI2. Recording was successful.But reception of data from host processor is not working in nxp.

I have verified hardware connection between NXP and host processor by probing the SAI2_RX_DATA at TP22. Also double confirmed by configuring SAI2_RX_DATA as GPIO I/P.But while debugging we have seen that xfer.data (SAI_TransferReceiveEDMA(SAI2, &SAI2_SAI_Rx_eDMA_Handle, &xfer)) is always zero.Seems it as a configuration issue. Rx configuration and code snippet for receiving and sending the data is given below

RX configuration

sai_transceiver_t SAI2_Rx_config = {
.masterSlave = kSAI_Master,
.bitClock = {
.bclkSrcSwap = false,
.bclkSource = kSAI_BclkSourceBusclk,
.bclkPolarity = kSAI_PolarityActiveLow,
.bclkInputDelay = false
},
.frameSync = {
.frameSyncWidth = 16U,
.frameSyncPolarity = kSAI_PolarityActiveLow,
.frameSyncEarly = true,
},
.syncMode = kSAI_ModeAsync,
.channelMask = kSAI_Channel0Mask,
.startChannel = 0U,
.endChannel = 0U,
.channelNums = 1U,
.serialData = {
.dataMode = kSAI_DataPinStateTriState,
.dataWord0Length = (uint8_t)kSAI_WordWidth16bits,
.dataWordNLength = (uint8_t)kSAI_WordWidth16bits,
.dataWordLength = (uint8_t)kSAI_WordWidth16bits,
.dataOrder = kSAI_DataMSB,
.dataFirstBitShifted = 16U,
.dataWordNum = 2U,
.dataMaskedWord = 0x0U
},
.fifo = {
.fifoWatermark = 16U,
.fifoPacking = kSAI_FifoPackingDisabled,
.fifoContinueOneError = false

}

};

Code snippet

while (1)
{
xfer.data = Buffer + rx_index * BUFFER_SIZE;
xfer.dataSize = BUFFER_SIZE;
if (kStatus_Success == SAI_TransferReceiveEDMA(DEMO_SAI, &rxHandle, &xfer))
{
rx_index++;
}
if (rx_index == BUFFER_NUMBER)
{
rx_index = 0U;
}
xfer.data = Buffer + tx_index * BUFFER_SIZE;
xfer.dataSize = BUFFER_SIZE;
if (kStatus_Success == SAI_TransferSendEDMA(DEMO_SAI, &txHandle, &xfer))
{
tx_index++;
}
if (tx_index == BUFFER_NUMBER)
{
tx_index = 0U;
}
}

I have tried this as per the instruction mentioned in the below link.

https://community.nxp.com/t5/i-MX-RT/I2S-Bidirectional-communication-via-SAI2-in-sln-local2-iot/m-p/...

Could you please help me to resolve the issue?

Thanks in advance

kerryzhou · ‎04-13-2022

Hi @Blackpearl

Do you check your SAI2 wave which I told you.

Whether the SAI2_TX_DATA, and SAI2_RX_DATA have data or not in the wave?

Whether your host processor can receive the SAI data from the NXP MCU SAI2 or not?

Associated with wave, will be more easy to check details.

Best Regards,

Kerry

Blackpearl · ‎04-13-2022

Hi @kerryzhou ,

Yes . I have checked the waveforms. Hereby I am attaching the waveforms(bclk,fsync,and rx_data)

From host processor 0xa5a5 pattern has been sent to NXP.

kerryzhou · ‎04-13-2022

Hi @Blackpearl ,

Thanks for your wave.

What about the TX_data, whether the master RT chip can send out the correct data to your processor.

Your RX_data really has data, please debug your code, and check the Buffer, not the xfer.data. As buffer will be used to save the data.
Share with me the code project which just contains the SAI2 with CFG configuration for RX and TX, I need to check it. As I can't test it on my side, limit to work at home, lack board for testing.

From your code, you still lack the configuration which I can't see, you can refer to my previous code which send to you.

https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imxrt/18451/1/evkbimxrt1050_sai2_edma_re...

Best Regards,

Kerry

Blackpearl · ‎04-17-2022

Hi @kerryzhou ,

Thanks for the response. IMxRT is able to send TX_DATA properly.Because I could record DMIC data properly in the host processor. I am attaching the configuration c files.Could you please review the same?In sln-local2-iot SAI2_RX_DATA pin was used for receiving the DMIC 3 data.Is that cause any issue?

Thanks in advance.

kerryzhou · ‎04-18-2022

Hi @Blackpearl ,

Do you test it when debug?

I find your used SAI2_RX_DATA is the JTAG_MOD. It will influence the SWD mode. And it also has the 100k pull down, I don't know, whether this will influence your receive or not.

Can you try this pin:GPIO_EMC_08, it is also the RX_DATA pin.

I checked your code, didn't find the special area issue.

Best Regards,

Kerry

Blackpearl · ‎04-20-2022

Hi @kerryzhou ,

I tested it in debug mode.But while debugging the Fync is not coming from NXP.I will check the GPIO_EMC_08.But regarding this " I find your used SAI2_RX_DATA is the JTAG_MOD. It will influence the SWD mode. And it also has the 100k pull down, I don't know, whether this will influence your receive or not." , In sln-local2-iot already SAI2_RX_DATA (GPIO_AD_B0_08) is using for DMIC data connection.But DMIC is working in sln-local2-iot.

Blackpearl · ‎04-21-2022

Hi @kerryzhou ,

I have checked by muxing GPIO_EMC_08 as SAI2_RX_DATA as you said.But still issue is there. Host processor is sending an pattern(0xa5a5).Whenever debugging fsync is breaking and on continuous debugging sometimes RDR register showing the 0xa5a5 .Here I am attaching the image of the same.This observation was same when GPIO_AD_B0_08 is configured as SAI2_RX_DATA.

kerryzhou · ‎04-21-2022

Hi @Blackpearl ,

Due to COVID-19, I limit to work at home, and lack the board and tool to test it.

So, I suggest you test this SDK code for RT1060:

SDK_2_11_1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\sai\edma_record_playback

This must works for the receive and transfer, you just need to change the interface and the pins.

Best Regards,

Kerry

Blackpearl · ‎04-22-2022

Hi @kerryzhou ,

I have one doubt regarding DMA.I am using DMA0 for the SAI2 RX and TX.For SAI2 TX , DMA0 Channel 0 is using and for RX channel 1 is using.But I have seen that DMIC (SAI1) using DMA0 channel 1 .So that might be the issue.Please correct me if I am wrong.But I have disabled threads appTask,sln_shell_task and local_voice_task .Can we configure any other channel for SAI2 RX?Is RX and Tx over sai2 really possible?

kerryzhou · ‎04-22-2022

Hi @Blackpearl ,

You are right, DMA channel is also very important.

Please find it from the RM:

Do you use the correct one?

More details, check RM Table 4-3. DMA MUX Mapping.

Best Regards,

Kerry

Blackpearl · ‎04-22-2022

Hi @kerryzhou ,

I want to check whether the RDR data is coming or not.But while debugging as I said earlier fsync is not coming out of NXP.How can we resolve this?

kerryzhou · ‎04-23-2022

Hi @Blackpearl ,

One idea to help your testing.

Use this code:

SDK_2_11_1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\sai\edma_record_playback

You even just use the original pins if your board can support it, then test it with your external SAI, this project must can receive the data.

After it is working, you can modify the SAI to your desired SAI interface, and check which detail area you are missed.

As I am working at home, I can't help you do the testing directly, sorry for it.

And maybe recently, I still limit to work at home due to the COVID-19.

Thanks a lot for your understanding. SDK example is the very useful reference code.

Best Regards,

Kerry

Blackpearl · ‎04-24-2022

Hi @kerryzhou ,

Thanks for the support . How can we flash SDK_2_11_1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\sai\edma_record_playback in sln-local2-iot since flash configurations are different? What all configurations are needed for flashing imxrt1060 sdk example in sln-local2-iot?

kerryzhou · ‎04-24-2022

Hi @Blackpearl

SLN-LOCAL2-IOT board is using the hyperflash, you just need to modify the RT1060 SDK code, xip folder:evkmimxrt1160_flexspi_nor_config.c

Comment:

const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
.controllerMiscOption = 0x10,
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_133MHz,
.sflashA1Size = 16u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0x00, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x04, 0, 0, 0),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.ipcmdSerialClkFreq = 0x1,
.blockSize = 256u * 1024u,
.isUniformBlockSize = false,
};

Add:

const flexspi_nor_config_t hyperflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.columnAddressWidth = 3u,
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
.controllerMiscOption = (1u << kFlexSpiMiscOffset_DdrModeEnable) |
(1u << kFlexSpiMiscOffset_WordAddressableEnable) |
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = kFlexSpiSerialClk_100MHz,
.sflashA1Size = 32u * 1024u * 1024u,
.dataValidTime = {16u, 16u},
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
},
},
.pageSize = 512u,
.sectorSize = 256u * 1024u,
.blockSize = 256u * 1024u,
.isUniformBlockSize = true,
};

The debug device, you still select the RT106S, then you can debug it directly.

Best Regards,

Kerry

Blackpearl · ‎05-04-2022

Hi @kerryzhou ,

Thank you for the response.Issue is resolved.Some configurations were missing and DMA channel was already in use.

kerryzhou · ‎05-04-2022

Hi @Blackpearl ,

Thanks so much for your feedback.

I am glad to hear your issue is solved, please help to mark the correct answer, just to close this case, thanks.

Best Regards,

Kerry

Blackpearl · ‎05-09-2022

Hi @kerryzhou ,

DMA channel configured was not proper.Initially configured as 1 which is already used by the DMIC1 and bit clock configuration was also wrong.