I.MX RT1060 LCDIF clock source

[HAHA20222222]

I used MCUXpresso configuration tool to set RT1060 LCDIF.

The following figure shows the clock configuration.LCDIF_PRE_CLK_SEL is PLL3_PFD1_CLK.

But the actual frame rate is incorrect.

I measured the lcd clock pin frequency with a oscilloscope, it was3.85718MHz.

The actual clock frequency didn't change when I adjusted div of PLL3_PFD1. It was still 3.85718MHz.

Then, I choosed LCDIF source as PLL2_MAIN_CLK. The actual lcd clock is correct.

The attachment is clock_config.c that generated an incorrect lcd clock.

Thanks.

[HAHA20222222 · Accepted solution]

@jeremyzhou 

Hi,

Thank you for your reply.

I knew the cause of the problem.

The pll3 code  generated by the configuration tool  was commented out.

I recommend that the IDE alert the user to avoid use pll3_pfd1 as LCDIF_CLK when XIP_EXTERNAL_FLASH == 1.

In addition, there may be a bug of MCUXpresso,

1.I configured PLL2_MAIN_CLK as LCDIF clock source. The CCM registers was correct. Thr actual LCD clock frequency is also correct.

2. I changed the LCDIF clk source as PLL3_PFD1_CLK. CCM_CSCDR2 was wrong.

3. I compared the new clock.c and the old clock.c. I found someting wrong.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Firstly, I was wondering if you can introduce the testing environment, such as the board, demo code, etc.
Secondly, I'd like to suggest you observe the values of the CCM registers during the debug, it can help you to figure out whether there's another place to adjust the values of the CCM registers besides the BOARD_InitBootClocks() function.
Have a great day,
TIC

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