All,
We are having problems with the DCD on the iMXRT1021. The problem is with the documentation, so we have some questions:
1. Both the RT1020 Reference Manual and the RT1050 Security Reference Manual mention in the Note for the DCD Write Command that any target address outside of the allowed region cause the whole command to be invalidated. They also promise a list of allowable blocks and target addresses, but these don’t appear anywhere in the documents. We need a list of allowed regions for the RT1021
2. Are the Watchdog1 registers in these allowed regions?
3. The MCUXpresso Config Tool gives a small list of allowed registers, and when I enter an ITCM address (0x0000F000 in this case) says that it is not allowed. However, when actually implementing a DCD Write Command to this address it successfully completes. Is RAM different to Peripheral Register addresses?
4. What happens if an individual command specifies a number of bytes that exceeds the total DCD size?
Thanks,
Chris.
已解决! 转到解答。
Hi chriscowdery,
1, The picture which I share with you is from the RT1050SRM:
2. The table does not show any RAM? Does this mean the DCD cannot access any RAM region?
Answer: Yes, DCD need to use the valid address range in the table.
Wish it helps you!
If you still have questions about it, please kindly let me know.
Best Regards,
Kerry
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Hi Kerry,
Thankyou. Two followup questions:
1. Where is the table you show for answer #2 ? Which document?
2. The table does not show any RAM? Does this mean the DCD cannot access any RAM region?
Thankyou.
Chris.
Hi chriscowdery,
1, The picture which I share with you is from the RT1050SRM:
2. The table does not show any RAM? Does this mean the DCD cannot access any RAM region?
Answer: Yes, DCD need to use the valid address range in the table.
Wish it helps you!
If you still have questions about it, please kindly let me know.
Best Regards,
Kerry
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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Hi chriscowdery,
1. Both the RT1020 Reference Manual and the RT1050 Security Reference Manual mention in the Note for the DCD Write Command that any target address outside of the allowed region cause the whole command to be invalidated. They also promise a list of allowable blocks and target addresses, but these don’t appear anywhere in the documents. We need a list of allowed regions for the RT1021
Answer:
2. Are the Watchdog1 registers in these allowed regions?
Answer:
You can find the WDOG is not in the list.
3. The MCUXpresso Config Tool gives a small list of allowed registers, and when I enter an ITCM address (0x0000F000 in this case) says that it is not allowed. However, when actually implementing a DCD Write Command to this address it successfully completes. Is RAM different to Peripheral Register addresses?
Answer:
Please refer to the above picture which I share with you, you need to operate the address in the range.
4. What happens if an individual command specifies a number of bytes that exceeds the total DCD size?
Answer: I think if the size is exceeds, ROM will not copy the code which is out of size.
Wish it helps you!
If you still have questions about it, please kindly let me know.
Best Regards,
Kerry
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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