Hello,
We're currently using the MIMXRT1011CAE5A processor and have imported an SDK example (flexspi_nor_polling_transfer). We've made some changes to the code, which I'll provide in the link below.
The value of BOOT_CFG1[7:0] is 0x0000FFFF. However, there is a 1 in bits [2:1], which selects the flash type as Micron octal DDR. We are using Micron NOR flash through FLEXSPI, which is in quad mode. Is this the reason our booting is not happening from QSPI NOR flash? If so, the register is in read-only mode. How can we change the value?
Additionally, the FLEXSPI NOR image layout specifies that the field 0x0000~0x00FF should be an OTFAD keyblob (if present). Is it necessary to generate this keyblob? If yes, how should it be generated?
Hello @syed1 ,
In order to support you better, could you please provide me the next information?
This information will help me to provide you better answer, thank you for providing me that.
BR,
Habib.
Hello
Thank you for reaching out. Here are the details you requested:
Using Pins of BOOT_CFG or Fuses:
We are using the BOOT_CFG pins to change the Flash mode on our custom board.
The connections for the BOOT_MODE pins are as follows:
BOOT_MODE0: [The value is 0. The resistor is connected to ground]
BOOT_MODE1: [The value is 1]
The value of BOOT_MODE [1:0] is 10 (internal boot mode)
Obtaining the Value of 0x0000FFFF in the BOOT_CFG Register:
The value of 0x0000FFFF in the BOOT_CFG register was obtained by reading the register value during the boot process. This was verified using a debug interface and confirmed through our bootloader log outputs.
I hope this information helps. Please let me know if you need any further details or clarification.
Best regards,
Syed
Hello again @syed1,
Thank for the provided information, with respect at your issue, you should check your connections of the BOOT_CFG pins, as well as making sure that nothing external to the MCU might be changing interfering with the signals of these pins during the booting process. It's important that their values are logic 0 when the processor is in BOOT process, to allow the processor to communicate to a Serial NOR, as shown in the image below:
In the next image you can see which GPIO are the BOOT_CFG pins:
Also, if you experience any issue, do not hesitate to let me know.
BR
Habib.
Hello @Pablo_Ramos
Thank you for reaching out.
In the binary file that is generated for my application code I found that the IVT structure and boot data is between 0x1000 - 0x102F and my application binary starts from 0x2000.There are all F's in between 0x1030 to 0x1FFF.Is it correct?
Before loading program image do I need to flash any flash loader algorithm?
It is mentioned in the PDF AN12238.