[yocto][linux-imx to linux-fslc] CLK01 activation

aurele · ‎08-23-2016

Hi everyone,

I'm using a board equiped with IMX6 dual Lite, with codec sgtl5000, clk01 (on GPIO_0) is used as master clock for the sgtl5000.

The build system is yocto on branch krogoth

With linux-imx, everything was fine.

then I switched to Linux-fslc, now the sgtl5000 is not detected anymore, I could see that the clock is not generated anymore...

I checked the i2c control signals, everything is fine on the bus, but as the master clock is not available, the chip doesn't answer...

So now the sgtl 5000 is not detected anymore on the I2C bus

My question is :

How can I get this clock generated/activated? maybe something is missing in my devicetree but as I didn't modified it I don't know what it could be.

Thanks for any help

Aurele

I joined the content of /sys/kernel/debug/clk/clk_summary file. I saw that CKO clocks are not active at all

below some pieces of my devicetree :

&i2c2 {

status = "okay";

clock-frequency = <100000>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_i2c2_moniteur>;

codec: sgtl5000@0a {

compatible = "fsl,sgtl5000";

reg = <0x0a>;

clocks = <&clks 201>;

VDDA-supply = <&reg_3p3v>;

VDDIO-supply = <&reg_3p3v>;

};

&ssi1 {

fsl,mode = "i2s-slave";

status = "okay";

};

sound {

compatible = "fsl,imx6dl-moniteur-sgtl5000", "fsl,imx-audio-sgtl5000";

model = "imx6dl-moniteur-sgtl5000";

ssi-controller = <&ssi1>;

audio-codec = <&codec>;

audio-routing =

"MIC_IN", "Mic Jack",

"Mic Jack", "Mic Bias",

"Headphone Jack", "HP_OUT";

mux-int-port = <1>;

mux-ext-port = <3>;

};

in iomuxc section :

pinctrl_moniteur: moniteurgrp {

fsl,pins = <

MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* SGTL5000 sys_mclk */

MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 /* BP0 */

MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 /* BP1 */

MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* BP2 */

MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 /* BP3 */

MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x80000000 /* Reset DSP */

MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* Mute Ampli HP */

MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* Mute Ampli Loop */

>;

};

pinctrl_i2c2_moniteur: i2c2grp-moniteur {

fsl,pins = <

MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1

MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1

>;

};

root@MON100003:~# cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate accuracy phase---------------------------------------------------------------------------------------- anaclk2 0 0 0 0 0 lvds2_in 0 0 0 0 0 anaclk1 0 0 0 0 0 lvds1_in 0 0 0 0 0 dummy 3 4 0 0 0 lvds2_sel 0 0 0 0 0 lvds2_gate 0 0 0 0 0 usbphy2_gate 1 1 0 0 0 usbphy1_gate 1 1 0 0 0 osc 6 6 24000000 0 0 cko2_sel 0 0 24000000 0 0 cko2_podf 0 0 24000000 0 0 cko2 0 0 24000000 0 0 cko 0 0 24000000 0 0 periph_clk2_sel 0 0 24000000 0 0 periph_clk2 0 0 24000000 0 0 gpt_3m 1 1 3000000 0 0 pll7_bypass_src 1 1 24000000 0 0 pll7 1 1 480000000 0 0 pll7_bypass 1 1 480000000 0 0 pll7_usb_host 1 1 480000000 0 0 usbphy2 1 1 480000000 0 0 pll6_bypass_src 1 1 24000000 0 0 pll6 1 1 500000000 0 0 pll6_bypass 1 1 500000000 0 0 pll6_enet 1 1 500000000 0 0 enet_ref 1 1 50000000 0 0 pcie_ref 0 0 125000000 0 0 pcie_ref_125m 0 0 125000000 0 0 sata_ref 0 0 100000000 0 0 sata_ref_100m 0 0 100000000 0 0 lvds1_sel 0 0 100000000 0 0 lvds1_gate 0 0 100000000 0 0 pll5_bypass_src 0 0 24000000 0 0 pll5 0 0 296600000 0 0 pll5_bypass 0 0 296600000 0 0 pll5_video 0 0 296600000 0 0 pll5_post_div 0 0 74150000 0 0 pll5_video_div 0 0 74150000 0 0 ipu2_di1_pre_sel 0 0 74150000 0 0 ipu2_di1_pre 0 0 37075000 0 0 ipu2_di1_sel 0 0 37075000 0 0 ipu2_di1 0 0 37075000 0 0 ipu2_di0_pre_sel 0 0 74150000 0 0 ipu2_di0_pre 0 0 24716667 0 0 ipu2_di0_sel 0 0 24716667 0 0 ipu2_di0 0 0 24716667 0 0 ipu1_di1_pre_sel 0 0 74150000 0 0 ipu1_di1_pre 0 0 24716667 0 0 ipu1_di1_sel 0 0 24716667 0 0 ipu1_di1 0 0 24716667 0 0 ipu1_di0_pre_sel 0 0 74150000 0 0 ipu1_di0_pre 0 0 24716667 0 0 ipu1_di0_sel 0 0 24716667 0 0 ipu1_di0 0 0 24716667 0 0 ldb_di1_sel 0 0 74150000 0 0 ldb_di1_div_7 0 0 10592857 0 0 ldb_di1_div_sel 0 0 10592857 0 0 ldb_di1 0 0 10592857 0 0 ldb_di1_div_3_5 0 0 21185714 0 0 ldb_di0_sel 0 0 74150000 0 0 ldb_di0_div_7 0 0 10592857 0 0 ldb_di0_div_sel 0 0 10592857 0 0 ldb_di0 0 0 10592857 0 0 ldb_di0_div_3_5 0 0 21185714 0 0 pll4_bypass_src 0 0 24000000 0 0 pll4 0 0 147456000 0 0 pll4_bypass 0 0 147456000 0 0 pll4_audio 0 0 147456000 0 0 pll4_post_div 0 0 36864000 0 0 pll4_audio_div 0 0 36864000 0 0 pll3_bypass_src 1 1 24000000 0 0 pll3 1 1 480000000 0 0 pll3_bypass 1 1 480000000 0 0 pll3_usb_otg 3 4 480000000 0 0 periph2_clk2_sel 0 0 480000000 0 0 periph2_clk2 0 0 480000000 0 0 asrc_sel 0 0 480000000 0 0 asrc_pred 0 0 240000000 0 0 asrc_podf 0 0 30000000 0 0 asrc 0 0 30000000 0 0 esai_sel 0 0 480000000 0 0 esai_pred 0 0 240000000 0 0 esai_podf 0 0 30000000 0 0 esai_extal 0 0 30000000 0 0 pll3_60m 0 1 60000000 0 0 can_root 0 0 30000000 0 0 can2_serial 0 0 30000000 0 0 can1_serial 0 0 30000000 0 0 ecspi_root 0 1 60000000 0 0 ecspi4 0 0 60000000 0 0 ecspi3 0 0 60000000 0 0 ecspi2 0 2 60000000 0 0 ecspi1 0 0 60000000 0 0 pll3_80m 1 1 80000000 0 0 uart_serial_podf 1 1 80000000 0 0 uart_serial 2 3 80000000 0 0 pll3_120m 0 0 120000000 0 0 pll3_pfd3_454m 0 0 454736842 0 0 spdif_sel 0 0 454736842 0 0 spdif_pred 0 0 227368421 0 0 spdif_podf 0 0 28421053 0 0 spdif 0 0 28421053 0 0 pll3_pfd2_508m 0 0 508235294 0 0 ssi3_sel 0 0 508235294 0 0 ssi3_pred 0 0 127058824 0 0 ssi3_podf 0 0 63529412 0 0 ssi3 0 0 63529412 0 0 ssi2_sel 0 0 508235294 0 0 ssi2_pred 0 0 127058824 0 0 ssi2_podf 0 0 63529412 0 0 ssi2 0 0 63529412 0 0 ssi1_sel 0 0 508235294 0 0 ssi1_pred 0 0 127058824 0 0 ssi1_podf 0 0 63529412 0 0 ssi1 0 0 63529412 0 0 pll3_pfd1_540m 2 2 540000000 0 0 axi_alt_sel 1 1 540000000 0 0 axi_sel 1 1 540000000 0 0 axi 2 2 270000000 0 0 openvg_axi 0 0 270000000 0 0 vpu_axi_sel 0 0 270000000 0 0 vpu_axi_podf 0 0 270000000 0 0 vpu_axi 0 0 270000000 0 0 vdo_axi_sel 0 0 270000000 0 0 vdo_axi 0 0 270000000 0 0 vdoa 0 0 270000000 0 0 emi_slow_sel 1 1 270000000 0 0 emi_slow_podf 1 1 135000000 0 0 eim_slow 2 2 135000000 0 0 pcie_axi_sel 0 0 270000000 0 0 pcie_axi 0 0 270000000 0 0 ipu1_sel 1 1 540000000 0 0 ipu1_podf 1 1 270000000 0 0 ipu1 2 2 270000000 0 0 ipu1_pclk1_sel 0 0 270000000 0 0 ipu1_pclk1_div 0 0 0 0 0 ipu1_pclk_1 0 0 0 0 0 ipu1_pclk0_sel 1 1 270000000 0 0 ipu1_pclk0_div 1 1 27000000 0 0 ipu1_pclk_0 1 1 27000000 0 0 dcic1 0 0 270000000 0 0 hdmi_isfr 0 0 540000000 0 0 video_27m 0 0 27000000 0 0 pll3_pfd0_720m 0 0 720000000 0 0 usbphy1 0 0 480000000 0 0 pll2_bypass_src 1 1 24000000 0 0 pll2 1 1 528000000 0 0 pll2_bypass 1 1 528000000 0 0 pll2_bus 1 1 528000000 0 0 pll2_pfd2_396m 1 1 396000000 0 0 enfc_sel 0 0 396000000 0 0 enfc_pred 0 0 79200000 0 0 enfc_podf 0 0 19800000 0 0 enfc 0 0 19800000 0 0 gpmi_io 0 0 19800000 0 0 ipu2_sel 0 0 396000000 0 0 ipu2_podf 0 0 198000000 0 0 ipu2 0 0 198000000 0 0 dcic2 0 0 198000000 0 0 emi_sel 0 0 396000000 0 0 emi_podf 0 0 198000000 0 0 usdhc4_sel 0 0 396000000 0 0 usdhc4_podf 0 0 198000000 0 0 usdhc4 0 0 198000000 0 0 gpmi_bch 0 0 198000000 0 0 usdhc3_sel 0 0 396000000 0 0 usdhc3_podf 0 0 198000000 0 0 usdhc3 0 0 198000000 0 0 apbh_dma 0 0 198000000 0 0 per1_bch 0 0 198000000 0 0 gpmi_bch_apb 0 0 198000000 0 0 gpmi_apb 0 0 198000000 0 0 usdhc2_sel 0 0 396000000 0 0 usdhc2_podf 0 0 198000000 0 0 usdhc2 0 0 198000000 0 0 usdhc1_sel 0 0 396000000 0 0 usdhc1_podf 0 0 198000000 0 0 usdhc1 0 0 198000000 0 0 hsi_tx_sel 0 0 396000000 0 0 hsi_tx_podf 0 0 198000000 0 0 hsi_tx 0 0 198000000 0 0 periph2_pre 0 0 396000000 0 0 periph2 0 0 396000000 0 0 mmdc_ch1_axi 0 0 396000000 0 0 periph_pre 1 1 396000000 0 0 periph 2 2 396000000 0 0 mmdc_ch0_axi 1 1 396000000 0 0 gpu3d_axi 0 0 396000000 0 0 gpu2d_axi 0 0 396000000 0 0 ahb 6 7 132000000 0 0 sdma 8 2 132000000 0 0 sata 0 0 132000000 0 0 rom 1 1 132000000 0 0 ocram 2 2 132000000 0 0 hdmi_iahb 0 0 132000000 0 0 esai_mem 0 0 132000000 0 0 esai_ipg 0 0 132000000 0 0 caam_aclk 1 1 132000000 0 0 caam_mem 1 1 132000000 0 0 asrc_mem 0 0 132000000 0 0 asrc_ipg 0 1 132000000 0 0 cko1_sel 0 0 132000000 0 0 cko1_podf 0 0 16500000 0 0 cko1 0 0 16500000 0 0 ipg 5 6 66000000 0 0 usboh3 0 0 66000000 0 0 uart_ipg 2 3 66000000 0 0 ssi3_ipg 0 0 66000000 0 0 ssi2_ipg 0 0 66000000 0 0 ssi1_ipg 0 1 66000000 0 0 spdif_gclk 0 0 66000000 0 0 spba 0 0 66000000 0 0 iim 0 0 66000000 0 0 gpt_ipg 1 1 66000000 0 0 enet 2 2 66000000 0 0 can2_ipg 0 0 66000000 0 0 can1_ipg 0 0 66000000 0 0 caam_ipg 1 1 66000000 0 0 ipg_per 1 1 66000000 0 0 pwm4 0 0 66000000 0 0 pwm3 0 0 66000000 0 0 pwm2 0 0 66000000 0 0 pwm1 1 1 66000000 0 0 i2c3 0 0 66000000 0 0 i2c2 0 0 66000000 0 0 i2c1 0 0 66000000 0 0 gpt_ipg_per 0 0 66000000 0 0 i2c4 0 0 66000000 0 0 step 0 0 396000000 0 0 pll2_198m 0 0 198000000 0 0 pll2_pfd1_594m 0 0 528000000 0 0 gpu3d_shader_sel 0 0 528000000 0 0 gpu3d_shader 0 0 528000000 0 0 gpu2d_core 0 0 528000000 0 0 gpu3d_core_sel 0 0 528000000 0 0 gpu3d_core_podf 0 0 528000000 0 0 gpu3d_core 0 0 528000000 0 0 pll2_pfd0_352m 0 0 306580645 0 0 gpu2d_core_sel 0 0 306580645 0 0 gpu2d_core_podf 0 0 153290323 0 0 mlb 0 0 153290323 0 0 pll1_bypass_src 1 1 24000000 0 0 pll1 1 1 996000000 0 0 pll1_bypass 1 1 996000000 0 0 pll1_sys 1 1 996000000 0 0 pll1_sw 1 1 996000000 0 0 arm 1 1 996000000 0 0 twd 0 0 498000000 0 0 ckih1 0 0 0 0 0 ckil 0 0 32768 0 0

Original Attachment has been moved to: clk_summary.zip

igorpadykov · ‎08-23-2016

Hi Aurele

Linux-fslc is supported by community

https://community.freescale.com/message/402940#402940

one can post it on meta-fsl-arm mailing list, so that someone familiar

with it could try to assist you

https://lists.yoctoproject.org/listinfo/meta-freescale

Best regards
igor
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[yocto][linux-imx to linux-fslc] CLK01 activation

[yocto][linux-imx to linux-fslc] CLK01 activation

i.MX6DL

Linux

Yocto Project