internal boot from uSHC2

[lk22]

Hi,

We are using i.MX6 Solo processor. For that we are using boot mode 10 (internal boot mode) and done GPIO setting for boot from uSHC--2 (microSD card). But it is not booting from it. I have checked the clock and command lines, but I have not seen any activity there.

In boot mode 00,  because of manufacturing mode it is booting from uSHC--2 (microSD card).

I have checked all the GPIO settings. For reference I have attaché d the GPIO settings.

With regards

LK

[igorpadykov]

Hi Lalit

does second POR (without power-off board) help ?

Best regards

igor

[lk22]

No. I have tried many resets (without power off) after that.

[igorpadykov]

one can connect jtag debugger and check

SRC_SBMR1,2 registers, they should have

correct boot settings, which set by boot pins.

[lk22]

Yes,  SRC_SBMR1,2 registers have correct boot settings.

[igorpadykov]

had you checked SD2 signals by ocilloscope

during power-up, have you valid signal on CD,

as shows Table 8-18 IMX6SDLRM   ?

[lk22]

Yes. I have checked all gpio settings. Also checked cmd and clock lines with boot mode 00 and 10. In boot mode 10 there is no signal,while in boot mode 00 i was able to get the clock in oscilloscope.

CD is low then only it is booting from sd-2 in boot mode 00.

[igorpadykov]

why CD level different in two cases ?

It is output from SD card and should be correct (card present)

in both cases.

[lk22]

It is same in both cases, not different.

[igorpadykov]

what reference design is based your board - is it Freescale

reference board ? Also is pmic used, if yes what its full marking ?

[lk22]

Yes, I had referred Freescale SABRE-AI_DualLite_CPUcard

PMIC marking is

MMPF0100

F2EP

DKHYDC

With regards

LK

[igorpadykov]

please check by oscilloscope voltages (_ARM_CAP,SOC_CAP,HIGH_CAP)

and clocks 24MHz,32.768KHz in both good and bad cases.

Check that ripple noise should be less than 5% Vp-p of supply voltage average value.

Also check if _CAP capacitors comply with latest recommendations below

HW Design Checking List for i.MX6DQSDL

~igor

[lk22]

VDDARM_CAP: 1.17V (pk-pk ripple 0.84%)

VDDSOC_CAP: 1.17V (pk-pk ripple 3.4%)

VDDHIGH_CAP: 2.52V (pk-pk ripple 1.78%)

24MHz and 32.768KHzboth are in good shape

We have taken care whatever mention in the checklist.

It is booting from SD-2 slot in boot mode 00. So I am just thinking, if there is any such issue, it should create problem there also. We are not able to get the clock or command signals itself. It means it is not even going to that step.

With regards

LK

[igorpadykov]

could you try to set BOOT_CFG2[5]=0 1-bit mode and check,

if it boots or any signal appears on SD bus ?

~igor

[lk22]

I had already tried this. Bit there was no clock signal.

[igorpadykov]

- if this issue happens on one board or all (how many)

- could you provide full i.MX6 marking

- in bad case, does processor go to "Serial Downloader"

or just hangs ? If hangs, could you attach jtag and check where (address) ?

~igor

[lk22]

This issue happens on all boards

Full .MX6S marking:

MCIMX6S7CVM08AC

XAA1423

2N81E

TAIW AWAAXD

We don’t have OTG port. I think it hangs. I have to check on it.

With regards

LK

[igorpadykov]

also please recheck that BOOT_CFG4[7]

(UART3_RTS ) not set to "1".

Table 8-2. Boot eFUSE Descriptions IMX6SDLRM

BOOT_CFG4[7]=1  Infinite Loop Enable at start

of boot ROM. Used for debugging purposes.

[lk22]

BOOT_CFG4[7] is 1 as per original design. Only in one board we have changed it to 0, as per suggestion from Artur (tech support, Freescale).

With regards

LK

[igorpadykov]

with BOOT_CFG4[7] = 1 board will not boot

according to Table 8-2. Boot eFUSE Descriptions IMX6SDLRM

BOOT_CFG4[7]=1  Infinite Loop Enable at start

of boot ROM. Used for debugging purposes.

[lk22]

Yes, so I have made it 0. But it is still not booting.