imx7s lpddr3 support

[jiangxd]

Hi There,

I wonder if you could provide the ddr support aid for imx7s CPU.

I just find this kind of tools for iMX6 like this: https://community.freescale.com/docs/DOC-94917.

But no such tool for imx7s on the community.

I used the imx7s chip, but replaced the DDR3 with a new Kingston 08EMCP04-EL3AV100 chip, now the MFGtools tells me

that the u-boot.imx is flashed into the RAM, but it can not output more, I do not know what is going there, what should I do

to test if my LPDDR3 is inited, and how could I bring up the u-boot?

The MFGtools log end with:

ModuleID[2] LevelID[10]: *********MxHidDevice[017BE670] Jump to Ramkernel successfully!**********ModuleID[2] LevelID[10]: CmdOperation[0], current state command has been finished and the last command is successful, so SetEvent(hDevCanDeleteEvent)
ModuleID[2] LevelID[10]: CCmdOpreation[0] thread is Closed
ModuleID[2] LevelID[10]: CCmdOpreation[0] thread is Closed
ModuleID[2] LevelID[10]: DeviceManager::OnMsgDeviceEvent() - EVENT_KILL
ModuleID[2] LevelID[10]: CMyExceptionHandler::OnMsgExceptionEvent() - KillExceptionHandlerThread
ModuleID[2] LevelID[10]: Exception Handler thread is closed
ModuleID[2] LevelID[1]: delete MxHidDeviceClass
ModuleID[2] LevelID[10]: delete MxHidDevice[017BE670]
ModuleID[2] LevelID[10]: Device Manager thread is closed

From the u-boot team I know that:

You have to prepare the LPDDR3 script before bringing up the u-boot.   Update the new LPDDR3 script to the imximage.cfg for DCD generation.  Without LPDDR3 ready, the u-boot won’t up. Your problem met in mfgtool seems like this.

You can try the imximage.cfg under 19x19_ddr3_arm2 board or 12x12_ddr3_arm2 board for your LPDDR3.  If they don’t work, you have to generate LPDDR3 script according to your LPDDR3 chip and board design.  The DDR controller is different on i.MX7 and i.MX6. So the tool for i.MX6 can’t be used on i.MX7.  You need contact FAE to get the new tool for i.MX7.

Can you help?

[igorpadykov]

Hi jiangxd@embest-tech.com

support for preproduction chips provided in special way,

please contact your local fae. However from attached log

seems mfg tools successfully programmed image, so there is

chance of using default ddr settings, wthout modification of cfg file.

You can follow attached Porting Guide to account for any board

modifications, compared with reference board. Also one can follow

debug steps for boot as for other i.MX6 processors: observe

signals with oscilloscope, attach jtag, check SBMR1,SBMR2 registers,

check for example below link:

i.MX6Q NAND boot issues

Best regards

igor

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[lee_ee]

Hi,

Would you please share the  08EMCP04-EL3AV100 datasheet with me?

I can not find it.

Thanks a lot,