imx6q: lvds clock

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imx6q: lvds clock

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christiangmeine
Contributor I

Hi all.

I am running into a very tricky problem. It can happen that after X reboots the SoC does not generate the lvds
clock signal (also no lvds data).

I am using a vanilla linux kernel 3.12.4. The clock registers are programmed with good values. Is there any special

way to reset the soc (hardware wise)?

Thanks

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fabio_estevam
NXP Employee
NXP Employee

Sorry, I mean:

"+#include "mx6_common.h"

View solution in original post

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fabio_estevam
NXP Employee
NXP Employee

Can you share your full log (from U-boot to kernel)?

Do you have the splash screen enabled in U-boot?

Regards,

Fabio Estevam

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fabio_estevam
NXP Employee
NXP Employee

Or just let me know what you get in U-boot prompt after doing:

=> md.l 0x20c8140 1


Regards,


Fabio Estevam

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christiangmeine
Contributor I

Hi Fabio.

My used u-boot does not enable any graphics related stuff. The Linux kernel does init the ipu and lvds

via imx-drm. In the case where no LVDS clock and data is there:

root@OT:~# devmem2 0x20c8140 w

/dev/mem opened.

Memory mapped at address 0xb6f52000.

Value at address 0x20C8140 (0xb6f52140): 0x482416

greets

Christian

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fabio_estevam
NXP Employee
NXP Employee

Hi Christian,

Your VDDSOC voltage is below the spec for 792MHz operation (you set it as 1.15V, U-boot 2014.01 configures it at 1.175V).

What do you get if you read 0x20c8140 from U-boot?

Regards,

Fabio Estevam

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christiangmeine
Contributor I

U-Boot 2014.01-dirty (Jan 29 2014 - 09:11:58)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz

Reset cause: POR

Board: ot1200

I2C:   ready

DRAM:  1 GiB

MMC:   FSL_SDHC: 0

SF: Detected M25P16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB

In:    serial

Out:   serial

Err:   serial

Net:   using phy at 5

FEC [PRIME]

Warning: failed to set MAC address

Hit any key to stop autoboot:  0

=> md.l 0x20c8140 1

020c8140: 00482412                               .$H.

Okay... then I need to figure out why VDDSOC voltage is wrong.

On a boot with working LVDS I read this in Linux:

root@OT:~# devmem2 0x20c8140 w

/dev/mem opened.

Memory mapped at address 0xb6f1d000.

Value at address 0x20C8140 (0xb6f1d140): 0x482416

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fabio_estevam
NXP Employee
NXP Employee

Make sure you do this in your board config file:

#include "mx6sabre_common.h"

mx6_common.h selects CONFIG_BOARD_POSTCLK_INIT, which will call:

int board_postclk_init(void)

{

       set_ldo_voltage(LDO_SOC, 1175); /* Set VDDSOC to 1.175V */

       return 0;

}

Regards,

Fabio Estevam

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christiangmeine
Contributor I

Okay.. changed my current used u-boot and I get now:

root@OT:~# devmem2 0x20c8140 w

/dev/mem opened.

Memory mapped at address 0xb6feb000.

Value at address 0x20C8140 (0xb6feb140): 0x4C2416

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fabio_estevam
NXP Employee
NXP Employee

Great, then you should not observe the LVDS clock issue anymore.

Regards,

Fabio Estevam

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fabio_estevam
NXP Employee
NXP Employee

Christian,

Please confirm whether this fixes this issue.

Regards,

Fabio Estevam

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christiangmeine
Contributor I

My colleagues and I will runs some tests during the next week. I will keep you informed.

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fabio_estevam
NXP Employee
NXP Employee

Christian,

Does this patch fix the issue for you?

http://ftp.arm.linux.org.uk/cgit/linux-cubox.git/commit/?h=unstable/cubox-i&id=fd8b0eb545c0338463086...

Regards,

Fabio Estevam

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christiangmeine
Contributor I

Fabio,

I have integrated this patch into our custom kernel based on 3.12.10 and it I could not trigger this issue again.

Greets

Christian

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christiangmeine
Contributor I

We did test this issue internally from some time now and it still can happen that there is no LVDS data/clock, which results in a black screen. To 50% a software reboot can help to get back an image on the screen, if not only a cold reboot helps.

I am using a 3.13.6 kernel with some small patches. Used u-boot version is still at 2014.01.

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fabio_estevam
NXP Employee
NXP Employee

Hi Christian,

I have just sent the following patch to linux-arm-kernel list in order to address this issue:

http://www.spinics.net/lists/arm-kernel/msg320863.html

Regards,

Fabio Estevam

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fabio_estevam
NXP Employee
NXP Employee

Christian,

I noticed that VDDARM is set at 1.25V by the kernel, which corresponds to the 996MHz operating point for the ARM frequency.

Latest kernel will increase VDDSOC to 1.25V at 996MHz as you can see at:

https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts/imx6q.dtsi?i...

(Search for fsl,soc-operating-points)

As 3.12 does not change the VDDSOC, then I would recommend you to set:

set_ldo_voltage(LDO_SOC, 1250);

as a workaround.

Also, make sure that VDD_ARM_IN and VDD_SOC_IN are within the spec as per the mx6 datasheet section "4.1.3 Operating Ranges"

Regards,

Fabio Estevam

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christiangmeine
Contributor I

Hi Fabio.

We are using the industrial version of the imx6d, which runs at max 792MHz (no PM in the kernel).

So I think that 1.175V should be ok.


Greets

Christian

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fabio_estevam
NXP Employee
NXP Employee

Sorry, I mean:

"+#include "mx6_common.h"

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