imx28 AUART Baudrate / Hispeed /clock

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imx28 AUART Baudrate / Hispeed /clock

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wolfgang_gaerbe
Contributor II

Hi,

We (want to) use AUART module with 3.25MBs - as this is indicated as maximum speed in the reference manual p.1937.

According to this manual p.1939 - the proper divisor is:

24M x 32 / 3250000 = 236 = 0xEC - the smallest divisor allowed.

Writing this divisor in BAUD_DIVFRAC and BAUD_DIVINT - we got the following behaviour:

TX operates on any divisor setting between dec. 224 - dec 239 wiht 3.4MBps.

It really looks like the lowest 4 Bits of BAUD_DIVFRAC have no influence on the TX clock.

Otherwise it seems that this bits are used for RX clock - and then it makes a difference.

1.) Is there a document which describes TX clock / RX clock in detail ?

2.) There are 2 indications of a "HISPEED" mode in the manual - and a bit which gives details  in the status register.

Is there a document describing HISPEED mode ?

rgds.

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Yuri
NXP Employee
NXP Employee

Hello,

1.

  Please refer to sections 24.2.1 (Fractional Baud Rate Divider)
and 30.2.1 (Fractional Baud Rate Divider) of the i.MX28 RM

about UART clock calculations.

http://cache.nxp.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf

You wrote, that low 4 bits of BAUD_DIVFRAC do not influence

of the speed ; note - 0xEC is the lowest allowed value and low bits

influence really is hard to detect. 

2.

The HISPEED bit field is used to indicate if UART IP supports hi-speed

mode.

Have a great day,
Yuri

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