Dear NXP Support Team,
Our client asks the following question:
What happens to the state of the IO pins of the iMX8M Mini SOC when it is not powered?
Will they be in high impedance or something else?
Thank You,
Boris
解決済! 解決策の投稿を見る。
got it, according to your description, these IO needs to use buffer to isolate, for what will happen, your client can refer to the data sheet as below
3.2 Power supplies requirements and restrictions
The system design must comply with power-up sequence, power-down sequence, and steady state
guidelines as described in this section to guarantee the reliable operation of the device. Any deviation
from these sequences may result in the following situations:
• Excessive current during power-up phase
• Prevention of the device from booting
• Irreversible damage to the processor (worst-case scenario)
refer to the IMX8MM HDG,
Hello NXP TechSupport,
Thank you for your quick response.
I would like to clarify my question.
I didn't mean unused power rail, as described in Table#36 of IMX8MM HDG.
Our client inserts our SOM with iMX8M Mini into his device, and accordingly, SOM is powered from this device. He may have a situation where the SOM is not powered, but part of the GPIO connected to it will be powered. So the question is what will happen to the affected pins If it could cause damage to iMX8M Mini SOC, big leakage current, etc?
Best Regards,
Boris
got it, according to your description, these IO needs to use buffer to isolate, for what will happen, your client can refer to the data sheet as below
3.2 Power supplies requirements and restrictions
The system design must comply with power-up sequence, power-down sequence, and steady state
guidelines as described in this section to guarantee the reliable operation of the device. Any deviation
from these sequences may result in the following situations:
• Excessive current during power-up phase
• Prevention of the device from booting
• Irreversible damage to the processor (worst-case scenario)