iMX RT1024 JTAG and POR_B

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

iMX RT1024 JTAG and POR_B

ソリューションへジャンプ
1,759件の閲覧回数
zingae
Contributor II

Designing a custom board using RT1024 using the JTAG interface for programming and debugging...

I want to confirm that the JTAG_nTRST connection only connects the JTAG interface header (J55 on EVK) to pin GPIO_AD_B0_05 (pin 106 on 144-pin package). Please confirm that there is no connection of JTAG_nTRST to the POR_B pin (pin 50 on 144-pin package).

-----

Also in regards to the POR pin...

The documentation recommends using a voltage supervisory circuit for asserting POR pin HIGH after internal rails are up and running and that using a simple RC circuit could present issues. Is the issue with the RC circuit that the charge time would be too fast and could assert POR pin HIGH prematurely? Or is it a stability issue?

What is the worst case amount of time it would take for the internal power blocks to stabilize? Would the RC circuit be usable if the delay time is very long (say 100ms or more) to guarantee that even in worst case power-up time the RC would not assert POR to soon?

 

We will be using an external 1.2V LDO to power the SOC. If we not using the internal DCDC converter, is it possible to just leave POR_B pin disconnected? What circumstances is it OK to not connect the POR_B pin to anything?

 

Thanks!

ラベル(1)
0 件の賞賛
返信
1 解決策
1,705件の閲覧回数
DanielRuvalcaba
NXP TechSupport
NXP TechSupport

Hi,

There is no connection between pin 106 (JTAG_TRSTB) and pin 50 (POR_B). Just keep in mind that POR_B can reset the entire chip including the JTAG module.

DanielRuvalcaba_0-1657738070461.png

For more information I would recommend you to refer to chapter 3 of the Hardware Development Guide and chapter 4.2 of the Data Sheet.

Could you please take a look to the following threads? 

https://community.nxp.com/t5/i-MX-Processors/About-POR-B-signal/td-p/510975

https://community.nxp.com/t5/i-MX-RT/I-MX-RT1024-POR-B-pin-is-not-used/m-p/1466102

I hope this helps.

Have a good day!

Daniel.

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
1,685件の閲覧回数
zingae
Contributor II

Thank you for the response. Ok to the JTAG connections.

 

In regards to the POR_B connection, I am going to use an RC circuit with a 100ms+ charge time and see how that goes. I find it very interesting that the processor was intended to not need a POR_B pin connection but still has a strong recommendation to have it connected to an external circuit.

0 件の賞賛
返信
1,706件の閲覧回数
DanielRuvalcaba
NXP TechSupport
NXP TechSupport

Hi,

There is no connection between pin 106 (JTAG_TRSTB) and pin 50 (POR_B). Just keep in mind that POR_B can reset the entire chip including the JTAG module.

DanielRuvalcaba_0-1657738070461.png

For more information I would recommend you to refer to chapter 3 of the Hardware Development Guide and chapter 4.2 of the Data Sheet.

Could you please take a look to the following threads? 

https://community.nxp.com/t5/i-MX-Processors/About-POR-B-signal/td-p/510975

https://community.nxp.com/t5/i-MX-RT/I-MX-RT1024-POR-B-pin-is-not-used/m-p/1466102

I hope this helps.

Have a good day!

Daniel.

0 件の賞賛
返信