iMX 534 SDRAM DDR2 clock problem

[norell]

So i've been troubleshooting a product which uses a DDR2-800 32Mx16 (MT47H32M16HR-25E IT) together with a iMX (MCIMX534AVV8C). The product is in production state and a fairly high amount (10%) are failing when the core temp of the iMx gets up to 55-60 degrees celsius.

I have found that the diffrential clock from iMx to DDR2, DRAM_CLK0 and #DRAM_CLK0 is acting really weird when measuring with an active diffrential probe over the termination resistor. See the attached image: the clock signal is fairly high and has parts of it going to a lower state sporadically. When the iMx gets cooled down with coolingspray the clock level is stable and fine at the lower level on the image. Also when the clock is fine after cooling spray the iMx has no problem booting even at high ambient temperature (80 deg). I am convinced that the problem has something to do with the clock.

I have changed the iMx and also the DDR2 memory without any change.

I have x-rayed the card to ensure proper mounting of the components.

I have probed all voltages on the card.

I have tried changing the drive strength of the clock, from 43 Ohm to 150 Ohm, but the clock is still weird.

Does anyone recognize this?

I'll attach an image of the DDR part of the schematic aswell.

[norell]

Hi Igor i have tried changing the DSE without any luck. Now i have also disabled the 32KHz from Auto refresh. Now using the fast clock instead.

Still while probing on the CKIL i get the fault. I have find that if i first cool down the iMX until the ddr2 clock level is low and then probing the CKIL the levels stay low and it works much better in temperature..

Do you think it could be some kind of setting on the output of the 32KHz clock?

[norell]

The software is not working in temperature 50 celsius. First the board is watchdog resetting then when getting hotter i get start up error. The DDR test is working in high temperatures.

When probing on the slow CKIL clock (Y304) with my active probe 0.7pF 100Kohm i get a constant high(bad) level on the DDR clock and the card is getting boot error even in room temperature. Even the DDR test is failing at that moment.

How is the slow clock 32.768KHz connected to the 400MHz DDR2 clock?

//Måns

[igorpadykov]

one can check drive strength Table 43-2. DDR Output Driver Average Impedance,
sect.43.3.454 IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE
i.MX53 Reference Manual (rev.2.1  6/2012).
32.768KHz may be used for ddr refresh, sect.28.5.4 Auto Refresh Behavior
http://www.freescale.com/files/32bit/doc/ref_manual/iMX53RM.pdf

~igor

[norell]

See attached image for measurement on the clock, WE# and Data15 pin

Something is going on here, i get this level difference when measuring on almost all other control signals.

//Måns

[igorpadykov]

there is nothing wrong if signal does not violate Table 12. DDR2 I/O DC

Electrical Parameters i.MX53 Datasheet
http://cache.freescale.com/files/32bit/doc/data_sheet/IMX53CEC.pdf

Is software working properly on board, had ddr test passed ok.

In general signal may be affectied by probes, is it possible to measure

signals on nxp i.MX53 QSB reference board.

Also this may be caused by power supply and grounds, please try

lab well filtered power  supply with big margin on board current.

Best regards
igor

[norell]

Hello Igor and thanks for a quick response!

So i have probed all of the NVCC_EMI_DRAM pins while triggering on the "noise" and not finding anyting. I have also tried to get the official DDR stress test working even with help of the support but with no luck. I have written a simple program that runs minial, just writing and reading from the memory with the "noise" still on the clock.

I have also probed the DDR_VREF but that also looks fine.

Right now i'm testing different settings on the drive strength of the clock to see if that helps.

What could be internal of the iMX and react so fast when cooling it that affects the clock of the ddr...

But just to be clear, the clock is not suppose to look like in the image?

[igorpadykov]

Hi Mans

issue may be caused by NVCC_EMI_DRAM ripples (provides power

for DRAM_CLK0) and noise coupled from other board high speed traces.

Please recheck Chapter 2 i.MX53 Layout Recommendations i.MX53 User Guide

http://www.nxp.com/files/32bit/doc/user_guide/MX53UG.pdf 

One can try to run minimal image or try with ddr tester, link below

Lab and Test Software (2)
DDR Stress tester kit for the i.MX51 and i.MX53 (REV 1)
http://www.nxp.com/products/power-management/pmics/pmics-for-i.mx-processors/i.mx53-quick-start-boar...

Best regards
igor
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