i.MX6SDL VDD_SOC_IN specification.

[satoshishimoda]

Hi community,

I have a question about i.MX6SDL specification.

Please see Table 8 in IMX6SDCEC Rev.4.

There is no VDD_SOC_IN specification other than when VPU <= 328MHz.

Actually, i.MX6DQ has two VDD_SOC_IN specs (when 264MHz < VPU <= 352MHz, and VPU <= 264MHz), but i.MX6SDL has only one.

Is there other i.MX6SDL VDD_SOC_IN specs same as i.MX6DQ? (e.g. 328MHz < VPU < xxx MHz)

If there is no other specs, why i.MX6SDL has only one spec for VDD_SOC_IN?

Best Regards,

Satoshi Shimoda

[igorpadykov · Accepted solution]

Hi Satoshi

i.MX6SDL is quite different processor, so its characrestics are different from i.MX6DQ

Latest VDD_SOC_IN specs are given in datasheet, IMX6SDLCEC

there are no other specs. Such specs as "(e.g. 328MHz < VPU < xxx MHz)"

are not needed, since DDR bandwidth limitation (32bit@400MHz vs 64bit@532MHz)

takes into account.

Re: Re: Memory Reserved on i.MX6 for VPU

Best regards

igor

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[satoshishimoda]

Hi Igor,

I understood what is 264MHz of i.MX6DQ VDD_SOC_IN spec.

It is "AXI clock = 528MHz/2" made from MMDC_CH0 in Figure 18-2 in IMX6DQRM Rev.2.

And I found what is 328MHz, it is core clock limitation written in Table 9-7 in IMX6SDLRM Rev.1.

So I understand why there is no i.MX6SDL VDD_SOC_IN spec about 328MHz < VPU.

However, I have a new question.

Please see Table 9-7 in IMX6DQRM Rev.2, it says the VPU core clock is up to 264MHz.

But the VDD_SOC_IN spec of i.MX6DQ is defined about VPU < 264MHz in Table 6 in IMX6DQCEC Rev.3.

Why is this defined? Is there a case that VPU is used with over 264MHz?

Best Regards,

Satoshi Shimoda

[igorpadykov]

Hi Satoshi

I am afraid I could not fully understand you.

Table 9-7 gives generic VPU description, while

datasheets give specific (different for each processor)

characteristics. You can look at both i.MX6SDL and i.MX6QD

datasheets - they show VPU frequencies. They are different,

since processors are different.

Best regards

igor