i.MX6 - Best way to enable ENET_1588_EVENT0_OUT PPS events to the pin.

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i.MX6 - Best way to enable ENET_1588_EVENT0_OUT PPS events to the pin.

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justinfarrellya
Contributor III

We have an i.MX6 board, Kernel 3.10.17 running, PTP clock support and PPS core registered....... now all we need to do in plumb in the IEEE1588 ENET_1588_EVENT0_OUT pin to the clock to get a PPS pulse for external use.

Looking at the device tree and looking around other documentation there do not seem to be any standard examples of doing this. We are confident we can organize this ourselves, but ideally if there is a standard way of doing this or an example or two we would appreciate it.

In essence we want to accomplish the connection of the adjustable timer module to the events generator to the ENET_1588_EVENT0_OUT pin. Any thoughts or direction on doing this appreciated.

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FrankLi1z
NXP Employee
NXP Employee

3.14 release and latest upstream kernel already support it.

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justinfarrellya
Contributor III

Ok, if you are reading this and trying to go down this track there are a number of things you will need to know that are not clearly documented. We have solved our issues - and will be writing a guideline document to save you the pain we have had in the last weeks.... keep an eye on this space. Also you may want to look at other posts including one by David and myself on IEEE1588 timer interrupts - search for iMX6 - How to enable TCCR/TCSR event channel IRQ.

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mbp
Contributor V

Justin,

While I replied to David's posting elsewhere here - I am following up to see if you have been able to successfully complete your 1588 implementation on the Mx6 and your progress on a "guideline document" you were going to post (I know time permitting! :smileyhappy: )...

...I know you were working with Freescale to integrate the changes into a bsp update...(wondering how that is going/went)!

MUCH appreciate the work your doing and keeping the community abreast of it!  Skaal!

Thanks for a status update,

Mike

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justinfarrellya
Contributor III

Mike,

We have IEEE1588 running on the iMX6 with a PPS out pin after paying Freescale for a fix. Part of the deal we made was they would put that fix in the BSP for general distribution. We have no issues with it (fix or hardware), and it is holding nanosecond accuracy in a commercial application.

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frankchenmh
Contributor III

Hi Justin,

I have the same question on getting 1PPS on i.MX6Q board. The kernel I used is 4.1.15. Could you please let me know how you get 1PPS? Do we need to apply any patch or execute any linux command to get it?

Thanks!

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Yuri
NXP Employee
NXP Employee

Hello,

please refer to the following

How to get IEEE 1588 1PPS on i.MX6Q?

Regards,

Yuri.

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frankchenmh
Contributor III

Hi Yuri,

Thanks. The issue has been resolved as discussed in that thread.

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi Justin,

(1) Timer

    1588 timer has compare function,  set ENET_TCCRn register to generate 1pps from 1588_eventx_out.

IEEE-1588.png

(2)IOMUX

ENET_1588_EVENT0_OUT signal can be routed out through pin "GPIO_19", see i.mx6q reference maual.

Regards,

Weidong

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benhenricksen
Contributor III

Any updates on the software / documentation Justin is talking about? Is there a description of the actual failing / problem / issue?

I have posted a question about the errata in this area which is confusing:

iMX6 Errata ERR005895 - ENET 1588 channel 2 event capture mode not functional

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justinfarrellya
Contributor III

Morning Weidong,

I appreciate the reply. The issue we have is not how to use the compare and route the signal in the hardware - this as you point out is pretty straight forward.

What we need to know is how to do this in the kernel/at the operating system level - kernels later than 3.8, to be specific, and currently for us 3.10.17. (We can use a different kernel if that is appropriate to a solution to this issue). If you work in the IEEE1588 space Weidong, you will know that Freescale had a prototype architecture for IEEE1588 support in the 3.0. kernel tree that was then orphaned/removed as the 3.8 and later architecture came into being, but clearly was the basis for getting this ironed out. So (as we see it)  Freescale is working on IEEE1588/Kernel support in some form or other and before we launch off and make our own solution what we would like to know from you (or anyone really) is how, in a running 3.8 and later kernel environment, to achieve your points (1) and (2) above.

Any help or direction to anything else done by others much appreciated.

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