i.MX53 I2C iomux bug

[augusto]

We noticed on some i.MX53 I2C iomux macros a wrong mux setup that prevents some pin configurations to be used for I2C lines.

The file to be patched is arch/arm/plat-mxc/include/mach/iomux-mx53.h

Below an example of the fix:

#define _MX53_PAD_EIM_D21__I2C1_SCL IOMUX_PAD(0x474, 0x12C, 5, 0x814, 1, 0)

#define _MX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5, 0x818, 1, 0)

to be changed as:

#define _MX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, 0)

#define _MX53_PAD_EIM_D21__I2C1_SCL IOMUX_PAD(0x474, 0x12C, 5 | IOMUX_CONFIG_SION, 0x814, 1, 0)

otherwise SCL and SDA lines turns low for 500ms the up for other 500ms when a data transfer should occur.

We did not verified all the possible I2C pin configurations however this fix should also work for the non working others.

Augusto

Original Attachment has been moved to: iomux-mx53.h.zip

[Yuri]

The same point findings from KARO :

http://patchwork.ozlabs.org/patch/103773/

[TomE]

This is documented in the Reference Manual.

i.MX53 Multimedia Applications Processor Reference Manual (Rev. 2.1, 06/2012)

41.2 External Signals

Input of SCL and SDA also need to be manually opened by set SION bit in IOMUX after
corresponding PADs were selected as I2C function. [sic on steroids]

The above has been "turned into English" in later manuals:

i.MX 6Dual/6Quad Applications Processor Reference Manual (Rev. 1, 04/2013)

35.2 External Signals

Inputs of I2Cn_SCL and I2Cn_SDA also need to be manually enabled by setting the
SION bit in the IOMUX after the corresponding PADs are selected as I2C function.

As listed in "Table 41-1. Off-Chip Block Signals", there are FOURTEEN different pads that SDL and SCL can be routed to. Even after applying the latest patch above, only 11 of these have been fixed in the 2.6 code base.

In the later versions of Linux that use the Device Tree, the SION bit setting has been moved. Can you spot it?

        pinctrl_i2c1: i2c1grp {
            fsl,pins = <
                MX6QDL_PAD_EIM_D21__I2C1_SCL        0x4001b8b1
                MX6QDL_PAD_EIM_D28__I2C1_SDA        0x4001b8b1
            >;
        };

It is the "4" in "0x4001b8b1"!

Tom