i.MX233 and MT46V32M16P-5B DDR SDRAM initialization.

[BobCoggeshall]

I am in the process of bringing up a new design with the i.MX233 and MT46V32M16P-5B DDR SDRAM

I am booting off of SD and executing out of OCRAM just fine. But am stuck at the SDRAM initialization In the bootlet code there are 4 possible initialization routines:

init_mddr_mt46h32m16lf_96Mhz()

init_mddr_mt46h32m16lf_133Mhz()

init_ddr_mt46v32m16_96Mhz()

init_ddr_mt46v32m16_133Mhz()

I have tried all of these and none of them work and there is no documentation other than looking up the 40 some odd hex register settings up in the i.MX233 RM.

Before I do that I was wondering if there are any tools for coming up with proper iMX233 EMI register settings.

TIA

..c

[BobCoggeshall]

Thanks since this is first article I was sorting out hw errors vs sw errors. Turns out all my issues were with bad solder joints/opens/shorts. All is well now using init_ddr_mt46v32m16_133Mhz(). BTW, I was not using the EVK, I just installed the arm-gcc toolchain as described here: http://wiki.chumby.com/index.php/GNU_Toolchain Then built the bootlet versions found here http://lyre.svn.sourceforge.net/viewvc/lyre/propendous-imx233_board/firmware   BTW, the archives of this forum have been an invaluable resource.

Cheers,

..c

[VladanJovanovic]

When you built bootlets, did you make sure you also deployed them, so that bootstream was regenerated with the new bootlets included?

Shouldn't be necessary to go through all 40 regs., just modify usual DDR timings (RAS, CAS,....) values that might be different.