Hi NXPers,
I have a vehicle level custom board with MIMXRT1176AVM8A with DDR controller running at 198MHz (SDRAM-200), there are emissions from the 2th, 4th, 6th, 8th, 10th harmonics from this clock(meanwhile other high frequency were generated by 1176). The clock is provided by external memory interface.
I have tried to add 33Ω in the CLK line, decrease the drive strength, add beard in the power line, make sure the CLK and data line were in the layer 3 and 4, DDR module as close as possible to 1176, but just get a little improvement.
Is there any good solutions or suggestions in the layout/ schematics for this RE problem? If 1176 DDR controller support the SSCG?
Thanks
Louis Yu
Hello
Hope you are well.
These two documents can be helpful to improve EMC:
EMC Design Recommendation on i.MXRT Series (nxp.com)
AN12879: How to Enable Spread Spectrum for i.MX RT Family – Application Note (nxp.com)
It is also important that recommendations from the Hardware Development Guide were also followed.
If you have more questions do not hesitate to ask me.
Best regards,
Omar
Hi Omar,
Thank you reply me, here i have another question, when use the 1176 control the 100MHz PHY SOC(Realtek), the mode is running in RMII mode, if in RMII mode, ENET_CLK is used as the REF_CLK, which is a 50 MHz ± 50 ppm continuous reference clock. Is this REF_CLK have the SSC function? How to enable it? Thanks.