how to enable the I2C 3 bus on the imx6q sabresd

[divyardharan]

Hi all

As am very urgent.

Could anyone plz tell me how to enable the I2C 3 bus on the imx6q sabresd??

Regards

Divya R Dharan

[alejandrolozan1]

Hi,

Would you let us know wich linux kernel version are you using?

Best Regards,

Alejandro

[divyardharan]

Hi,

I could successfully enable the I2C3.

Thanks for your response.

Regards

Divya R Dharan

[alejandrolozan1]

That is great news!!

Would you be nice enough to share your solution?

Best Regards,

Alejandro

[divyardharan · Accepted solution]

Dear Alejandro

I added pin details in \arch\arm\mach-mx6\board-mx6q.c and board-mx6q.h files.

MX6Q_PAD_EIM_D18__I2C1_SDA,

MX6Q_PAD_EIM_D17__I2C1_SCL,

Also added mux configurations of these Pins in \arch\arm\plat-mxc\include\mach\ iomux-mx6q

#define MX6Q_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \

PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_40ohm | \

PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_SPEED_MED)

#define MX6QPAD_EIM_D17__I2C3_SCL \

IOMUX_PAD(0x03A8, 0x0094, 6 | IOMUX_CONFIG_SION, 0x08A8, 0, 0)

#define MX6QPAD_EIM_D18__I2C3_SDA \

IOMUX_PAD(0x03AC, 0x0098, 6 | IOMUX_CONFIG_SION, 0x08AC, 0, 0)

#define MX6Q_PAD_EIM_D17__I2C3_SCL \

(_MX6Q_PAD_EIM_D17__I2C3_SCL | MUX_PAD_CTRL(MX6Q_I2C_PAD_CTRL))

#define MX6Q_PAD_EIM_D18__I2C3_SDA \

(_MX6Q_PAD_EIM_D18__I2C3_SDA | MUX_PAD_CTRL(MX6Q_I2C_PAD_CTRL))

It works fine when I added above lines.

Thank You.

Regards

Divya R Dharan

[alejandrolozan1]

Thanks a lot!!

Best Regards,

Alejandro