failed to get clock parent error -22 (imx8qxp REV D)

[muhamza]

Hello,
I am trying to use imx8qxp-mek.dtb with my custom image on imx8qxp but it fails to load clock controller with following error:

imx8qxp-lpcg-clk: probe of 37620000.clock-controller failed with error -22

the source tries to get clock parent using function of_clk_parent_fill and it returns 0.
imx8qxp-mek.dtb's node of clock@37620000 :

                clock-controller@37620000 {
                        compatible = "fsl,imx8qxp-lpcg";
                        reg = <0x37620000 0x1000>;
                        #clock-cells = <0x01>;
                        clocks = <0x03 0x11f 0x02 0x23>;
                        bit-offset = <0x00 0x04>;
                        clock-output-names = "cm40_lpcg_uart_clk\0cm40_lpcg_uart_ipg_clk";
                        power-domains = <0x13 0x11f>;
                        phandle = <0x24>;
                };
​

I tried using prebuilt nxp images with imx8qxp-mek.dtb (by default it was using imx8qxp-mek-rpmsg.dtb) and got following bootloop:

[  298.848284] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[  298.855832] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[  298.878517] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[  298.885170] [drm] No driver support for vblank timestamp query.
[  298.891222] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[  298.899653] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[  298.907200] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[  298.929860] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[  298.936517] [drm] No driver support for vblank timestamp query.
[  298.942537] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[  298.951005] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[  298.958537] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[  298.981226] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[  298.987898] [drm] No driver support for vblank timestamp query.
[  298.993924] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[  299.002357] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[  299.009899] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[  299.032482] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[  299.039140] [drm] No driver support for vblank timestamp query.
[  299.045219] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[  299.053673] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[  299.061210] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[  299.083647] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[  299.090296] [drm] No driver support for vblank timestamp query.
[  299.096344] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)

[igorpadykov]

Hi Muhammad

for this issue may be recommended to rebuild custom image from scratch, not using default images,

use latest Linux 5.10.52_2.1.0 and AN13275  How to Enable Linux BSP L5.4 on a New iMX8/8X Board
https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applicat...

Best regards
igor

[muhamza]

Hi igor,
I have tried rebuilding from scratch but it keeps failing at finding parent clock at following function. Using imx linux 5.4.70 as base.
In 5.10.52 the driver has changed and does not require clock parent name as it did in imx5.4.70. Is there a possibility I can pick commits on changes to this driver and apply to my imx5.4.70 kernel

static int imx8qxp_lpcg_clk_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	const char *output_names[IMX_LPCG_MAX_CLKS];
	const char *parent_names[IMX_LPCG_MAX_CLKS];
	unsigned int bit_offset[IMX_LPCG_MAX_CLKS];
	struct clk_hw_onecell_data *clk_data;
	struct clk_hw **clk_hws;
	struct resource *res;
	void __iomem *base;
	bool autogate;
	int count;
	int ret;
	int i;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(base))
		return PTR_ERR(base);

	count = of_property_count_u32_elems(np, "bit-offset");
	if (count < 0) {
		dev_err(&pdev->dev, "failed to count clocks\n");
		return -EINVAL;
	}

	clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hws, count),
				GFP_KERNEL);
	if (!clk_data)
		return -ENOMEM;

	clk_data->num = count;
	clk_hws = clk_data->hws;

	ret = of_property_read_u32_array(np, "bit-offset", bit_offset,
					 clk_data->num);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to read clocks bit-offset\n");
		return -EINVAL;
	}

	ret = of_clk_parent_fill(np, parent_names, clk_data->num);
	if (ret != clk_data->num) {
		dev_err(&pdev->dev, "failed to get clock parent names\n");
		return -EINVAL;
	}

	ret = of_property_read_string_array(np, "clock-output-names",
					    output_names, clk_data->num);
	if (ret != clk_data->num) {
		dev_err(&pdev->dev, "failed to read clock-output-names\n");
		return -EINVAL;
	}

	autogate = of_property_read_bool(np, "hw-autogate");

	pm_runtime_get_noresume(&pdev->dev);
	pm_runtime_set_active(&pdev->dev);
	pm_runtime_set_autosuspend_delay(&pdev->dev, 500);
	pm_runtime_use_autosuspend(&pdev->dev);
	pm_runtime_enable(&pdev->dev);

	for (i = 0; i < clk_data->num; i++) {
		if (bit_offset[i] > 31) {
			dev_warn(&pdev->dev, "invalid bit offset of clock %d\n",
				 i);
			return -EINVAL;
		}

		clk_hws[i] = imx_clk_lpcg_scu_dev(&pdev->dev, output_names[i],
						  parent_names[i], 0, base,
						  bit_offset[i], autogate);
		if (IS_ERR(clk_hws[i])) {
			dev_warn(&pdev->dev, "failed to register clock %d\n",
				 i);
			return -EINVAL;
		}
	}

	ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,
					  clk_data);

	pm_runtime_mark_last_busy(&pdev->dev);
	pm_runtime_put_autosuspend(&pdev->dev);

	return ret;
}