failed to enable l2 cache on imx6d

[jiaojinxing]

hello , i have ported sylixos(an rtos from china) to imx6d cpu which work at smp mode

i have a question, when i enable l2 cache, i write pl310 control register to 0x01, but i read it again, i found its value is 0x00, this mean i enable l2 cache failed,

why?

[AnsonHuang]

Hi, jinxing

     Which register you wrote? The PL310's enable reg offset is 0x100, so you need to write 0x1 to 0xa02100.