Hello Sir/Madam,
Recently I do the research on i.MX8 family (8X and 8) for automotive application (digital cluster and infotainment).
I want to know the design purpose of ARM cortex-M4 core from your side, for real-time application or power consumption purpose?
Is it possible to run separate OS in A core and M core? e.g. AUTOSAR in M core and POSIX OS in A core. In this case, how about the power domain separation? I'm thinking this scenario that A core and GPU are shutdown, only M core and some peripherals e.g. CAN controller working in a very low energy mode to save power consumption, could you give me some advice on that?
解決済! 解決策の投稿を見る。
Hi Chao
> Is it possible to run separate OS in A core and M core?
yes
More description can be found in public presentations
Reference Manual on below links.
M4 is low power microcontroller available for customer application:
• Low power standby mode
• IoT features
• Manage IR or wireless remote
Also one can look at below app notes describing M4 usage:
AN12225 How to Reduce SoC Power when Running M4 with A53 on i.MX8M
AN12195 Implement Low-Power Audio on i.MX8M
For i.MX8QXP/QM usage and purpose is the same.
i.MX 8X Applications Processors| Arm® Cortex®-A35, Cortex-M4 | NXP
i.MX 8M Applications Processor | Arm® Cortex®-A53, Cortex-M4 | 4K display resolution | NXP
Best regards
igor
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Hi igor,
I too have similar question!!, what is the purpose of keeping M4 along with Cortex -A53 in imx8mmini or so? What are the best examples
which have been already implemented using these cores ?
I was going though Reference manual of imx8m Message Unit Section, explains about so many concepts, but are there any examples to verify those? I want to send an interrupt from M4 to A53 or vice versa by making use of below concepts. I could find very few examples in mcuexpress sdk that too simple messaging examples.... is OpenAmp supported on imx8m platform? or only RPmsglite works?
4.3.2.7.1 Interrupts to the Processors
There are 12 interrupt sources from the MU to the Processors:
• Four receive interrupts (asserted when the Processors receive full bits are set and
enabled in the xCR register) for each of the receive registers
• Four transmit interrupts (asserted when the Processor transmit empty bits are set and
enabled in the xCR register) for each of the transmit registers
• Four general purpose interrupts (asserted when the GIP bits are set and enabled in the
xCR register)
kindly update
Thank you for your quick reply, another question.
How about the power consumption in mA which A core and GPU, VPU is powered off, only M core running in a very low energy mode? In this case the system can be waked up via external interrupt e.g. CAN.
for power consumption one can look at AN12238
i.MX 8QuadXPlus Power Consumption Measurement
Best regards
igor
Hi Chao
> Is it possible to run separate OS in A core and M core?
yes
More description can be found in public presentations
Reference Manual on below links.
M4 is low power microcontroller available for customer application:
• Low power standby mode
• IoT features
• Manage IR or wireless remote
Also one can look at below app notes describing M4 usage:
AN12225 How to Reduce SoC Power when Running M4 with A53 on i.MX8M
AN12195 Implement Low-Power Audio on i.MX8M
For i.MX8QXP/QM usage and purpose is the same.
i.MX 8X Applications Processors| Arm® Cortex®-A35, Cortex-M4 | NXP
i.MX 8M Applications Processor | Arm® Cortex®-A53, Cortex-M4 | 4K display resolution | NXP
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------