Hello,
Customers can look at section 23.6.10.1.1 (Adjustable timer implementation) of
of i.MX 6Dual/6Quad Reference Manual, Rev. 5, 06/2018: "The counter produces the current time.
During each time-stamping clock cycle, a constant value is added to the current time as programmed
in ENETn_ATINC. The value depends on the chosen time-stamping clock frequency. For example, if it
operates at 125 MHz, setting the increment to eight represents 8 ns."
Section 23.6.10.5 (Input Capture and Output Compare) of the RM, describes the Capture
Compare block, which can be used to provide precise hardware timing for input and output events.
Have a great day,
Yuri
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Hi Yuri,
If I set the time-stamping clock frequency to 125MHz, can I get a recovered 1PPS within +/- 10nS difference compare the original IEEE1588 server's 1PPS source? Or what kind of result I can get? Like +/- 20nS?
Regards,
Yanjun Luo.
Hello,
Yes, theoretically for 125 MHz, +/- 8ns.
Regards,
Yuri.
Thank you Yuri!