We met the bus freq driver issue when running 5.15.71 on our IMX8MM DDR4 Board

[13614278]

Hi, 

We have IMX8MM DDR4 board, with 2GB RAM + 8GB EMMC，which runs well on Yocto sumo, 4.14.98

Now we have to upgrade our Board to Kirkstone 5.15.71 for some new features required from our customer, but we failed to upgrade this on our board.

Details:

Issue-1: we firstly try upgrade kernel only, which means we using old u-boot(2018.03) + kernel 5.15.71, the whole system halts in kernel, by debugging, we found it is caused by drivers/soc/imx/busfreq-imx8mq.c:

static int __init busfreq_init(void)
{
/*
if (platform_driver_register(&busfreq_driver) != 0)
    return -ENODEV;
*/
  printk(KERN_INFO "Bus freq driver module loaded\n");

  return 0;

}

We have to comment above platform_driver_register(), then our board can up normally. But obviouslly, this is not a correct way as it disable bus freq driver. 

Our question is : Does above change have any potential impact to the system?

Issue-2: We used the new uboot(2022.04)+Kernel 5.15.71, there is no bus freq driver freeze issue on the board, but the kernel keep reporing ddrc freq issues

```

kernel: ddrc freq set to low bus mode
kernel: ddrc freq set to high bus mode
kernel: ddrc freq set to low bus mode
kernel: ddrc freq set to high bus mode

```

I already raised this issue in the thread https://community.nxp.com/t5/i-MX-Processors/After-using-Yocto-Kirkstone-5-15-71-kernel-kernel-keep-...

Unfortunately, we didn't get the correct solution. We're told using DDR training tool in that thread, bu it doesn't help. After we replace ddr4_timing.c with the one generated by DDR Training tool, it report training failed:

-----------------

U-Boot SPL 2022.04 (Jun 16 2023 - 13:47:35 +0800)
power_bd71837_init
DDRINFO: start DRAM init
DDRINFO: DRAM rate 2400MTS
Training FAILED

-----------------

Could someone give us some advice? 

We just want to let our IMX8MM board runs on 5.15 Kirkstone correctly.

Thanks

[Dhruvit]

Hi @13614278,

I hope you are doing well.

Are you using EVK or a custom imx8mm DDR board?

For a custom board, one needs to perform a DDR Stress test using the DDR tool and patch the generated code to u-boot.

Please share the patches applied to u-boot & u-boot configuration files for further debugging.

Depending on the activity of the peripheral devices and CPU loading, the bus frequency driver varies
the DDR frequency between 24 MHz and its maximum frequency

Please refer to 2.5.4 Dynamic Bus Frequency in i.MX Linux Reference Manual.

Thanks & Regards,
Dhruvit Vasavada

[13614278]

Thank you for your help. We're using our own custom DDR4 IMX8MMini board, not the NXP's official EVK.

Here's the config and other stuff we have, hope we can get the correct advice to resolve our problem:

1) imx8mm_evk_defconfig.txt : the uboot config we use

2) our-training-ddr4_timing.c : the ddr file generated by NXP's DDR training tool

3) original-ddr4_timing.c : the original source file from uboot-2022.04/board/freescale/imx8mm_evk/ddr4_timing.c

Case-1: we built with original-ddr4_timing.c, it can bring up the system, but the kernel keep reporting

```

[ 10.017050] ddrc freq set to low bus mode
[ 14.050633] ddrc freq set to high bus mode
[ 15.137013] ddrc freq set to low bus mode
[ 16.866349] ddrc freq set to high bus mode

```

Case-2: As the suggestion given in this thread, we use the generated file our-training-ddr4_timing.c, when we flash the uboot, it report training failed, below is the output:

```

U-Boot SPL 2022.04 (Jun 30 2023 - 16:34:31 +0800)
power_bd71837_init
DDRINFO: start DRAM init
DDRINFO: DRAM rate 2400MTS
Training FAILED

```

As we can see, the file we trained contained 3 fields compared with the original one:

@@ -1261,5 +1384,6 @@ struct dram_timing_info dram_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 2400, 1066, },
-};
+ .fsp_table = { 2400, 1336, 100, },
+};

I am not sure if this is helpful or not.

Thank you and look forward to getting your advice.

[Dhruvit]

Hi @13614278,

I hope you are doing well.

Customers should use custom ddr4_timing.c generated by the DDR tool.

Please make sure that DDR Stress Test successfully passes for given frequency points.

Please make sure that the correct patch is applied for custom DDR.

From the logs, the board seems to be using bd71837 PMIC.

Please make sure that relevant changes are made in u-boot and kernel for BD17837 PMIC as the latest BSP supports PCA9450 by default.

Thanks & Regards,
Dhruvit Vasavada

[13614278]

Thank you very much for the quick help, in your below advice:

```

Please make sure that relevant changes are made in u-boot and kernel for BD17837 PMIC

```

Could you please tell us where, and how,  to get those relevant changes for BD17837 PMIC?

I don't have any clue about this, as what I can get is the default manifest info from https://github.com/nxp-imx/imx-manifest

[Dhruvit]

Hi @13614278,

I hope you are doing well.

To add support for BD17837 PMIC in latest BSP, One needs to do the following things.

-> Add device tree node support for BD17837 replacing PCA9450 in u-boot & kernel. 

For device tree node change, one can refer to the below commit. (and reverse the changes accordindly)

imx8mm_evk: Switch to new imx8mm evk board

-> Add configuration for BD17837 in board header config.((/include/configs/imx8mm_evk.h)

- #if defined(CONFIG_IMX8M_LPDDR4) && defined(CONFIG_TARGET_IMX8MM_EVK)
- #define CONFIG_POWER_PCA9450
- #else
- #define CONFIG_POWER_BD71837
- #endif
+ #define CONFIG_POWER_BD71837

Please refer to Configuring UBOOT for imx8mm using BD7184 PMIC for more information.

Thanks & Regards,
Dhruvit Vasavada