VDDHIGH/VSNVS diode voltage drop with MMPF0100 on startup

[electricar]

Hello,

like described in the i.MX6 Datsheet Rev.4 07/2015 on page 32:

"VDD_SNVS_IN supply must be turned ON before any other power supply. It may be connected
(shorted) with VDD_HIGH_IN supply."

I connected VDD_SNVS_IN and VDD_HIGH_IN at the i.MX6. Those rails are powered from the VGEN5 (+3V0_VDDHIGH) by the PMIC MMPF0100NPAZES with custom fuses. It's set to be powered first after power on.

Unfortunately I get a strange behaviour on the +3V0_VDDHIGH rail (which is connected to the VDD_SNVS_IN and VDD_HIGH_IN of the i.MX6). It looks like there is a diode voltage drop on the +3V0_VDDHIGH rail (2,6V instead of 3,0V) until the second rail +1V375_VDDARM gets powered by the PMIC.

Could this be a problem?

Thank you very much in advance!

[reyes]

Hi,

This should not cause any problem, but since you are using VGEN5 to supply VDD_SNVS_IN and VDD_HIGH_IN, I want to make some extra recommendations:

In case that you are connecting VDDSNVS, a Diode (D10 in the image below) is required to correct a problem on a small number of i.MX6 DualLite parts in which VDDSNVS does not come up when VDDHIGH_IN is applied.

VDDHIGH was placed on VGEN5 early in the design as a compromise solution for a board designed primarily for software development. Validation of the i.MX6 processor has shown that operations at elevated temperatures may cause VDDHIGH_IN to require much more current than VGEN5 can supply.

It is recommended for robust designs potentially operating at more extreme temperatures for VDDHIGH to be supplied from a power rail that can supply 250 mA or more.

This allows for datasheet maximum of 125 mA for internal VDDHIGH_IN loads plus 125 mA for external PHY IO loads.

The optional LDO U9 shown on this page could be reconfigured to supply both VDDHIGH_IN and VDD_SNVS_IN loads to meet the additional current requirements:

For more details I recommend you to take a look at the attached schematic.

Have a great day,
Jose

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[electricar]

Hello Jose,

thank you very much for your answer. We are using the i.MX6 Quad and Solo, not the DualLite.

Is the high current consumption on VDDHIGH a problem on the Quad version?

Also in the schematic this info is written near the LDO U9:

"U9 is no longer required for PF0100 VSNVS issue, but may be desired for NVCC_PLL_VOUT"

So is this still a problem?

Thank you very much in advance.

[reyes · Accepted solution]

Hi,

Yes, the same recommendation apply when using the i.MX6 Quad and Solo versions.

U9 is not needed, but it is recommended for robust designs, VDDHIGH_IN in some cases may require much more current than VGEN5 can supply, so the optional LDO can supply both VDDHIGH_IN and VDD_SNVS_IN loads to meet the additional current requirements.

Have a great day,
Jose

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------