Hi Ko-hey
>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?
correct
>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?
yes correct.
Best regards
igor
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Hi Ko-hey
>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?
correct
>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?
yes correct.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------