The status of FET in PMIC_ON_REQ pin

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

The status of FET in PMIC_ON_REQ pin

Jump to solution
791 Views
ko-hey
Senior Contributor II

Hi all,

 

I have a question about the status of FET in PMIC_ON_REQ.

The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input.

Am I correct ?

 

The FET stay GND before the voltage of VDD_SNVS_IN is input.

Am I correct ?

 

Ko-hey

 

Labels (4)
0 Kudos
1 Solution
653 Views
igorpadykov
NXP Employee
NXP Employee

Hi Ko-hey

>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?

 correct

>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?

yes correct.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
1 Reply
654 Views
igorpadykov
NXP Employee
NXP Employee

Hi Ko-hey

>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?

 correct

>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?

yes correct.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos