The status of FET in PMIC_ON_REQ pin

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The status of FET in PMIC_ON_REQ pin

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ko-hey
Senior Contributor II

Hi all,

 

I have a question about the status of FET in PMIC_ON_REQ.

The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input.

Am I correct ?

 

The FET stay GND before the voltage of VDD_SNVS_IN is input.

Am I correct ?

 

Ko-hey

 

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677 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Ko-hey

>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?

 correct

>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?

yes correct.

Best regards
igor
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678 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Ko-hey

>The FET of PMIC_ON_REQ will be open drain when the voltage of VDD_SNVS_IN is input. Am I correct ?

 correct

>The FET stay GND before the voltage of VDD_SNVS_IN is input. Am I correct ?

yes correct.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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