Hi,
I would like to check the iMx6 errata solution phase-in status in kernel 4.8 and u-boot 2016.10 and tried to filter out the items that come with software solution before (the patches in previous iMx6 BSP releases e.g. imx_3.0.35_4.1.0, .. ) in the table below.
I'm not sure how to check the software solutions to the errata items (marked in yellow) below. Need to get the feedback/comments from NXP team.
ERR005852, ERR003740,ERR005185,ERR005200,ERR009604,ERR006223,ERR009219,ERR005174,ERR004366,ERR009623,ERR005193,ERR005778,ERR005184,ERR009619,ERR009624,ERR007266,ERR009598,ERR008990,ERR004534,ERR006308,ERR004535,ERR007881,ERR004345,ERR004363
Errata number | Category | Description | In kernel 4.8 ? | In u-boot 2016.10 ? |
ERR005852 | Analog | Analog: Transition from Deep Sleep Mode to LDO Bypass Mode may cause the slow |
|
|
ERR003718 | ARM | ARM: 743622—Faulty logic in the Store Buffer may lead to data corruption |
| v |
ERR003720 | ARM/MP | ARM/MP: 751472—An interrupted ICIALLUIS operation may prevent the completion of a following broadcast operation |
| v |
ERR003724 | ARM | ARM: 754322—Possible faulty MMU translations following an ASID switch | v |
|
ERR003740 | ARM/PL310 | ARM/PL310: 752271—Double linefill feature can cause data corruption [i.MX 6Dual/6Quad only] |
|
|
ERR004325 | ARM/MP | ARM/MP: 764369—Data or unified cache line maintenance operation by MVA may not succeed on an Inner Shareable memory region | v |
|
ERR005185 | ARM/MP | ARM/MP: 771225—Speculative cacheable reads to aborting memory region clear the internal exclusive monitor, may lead to livelock |
|
|
ERR005199 | ARM/MP | ARM/MP: 769419—No automatic Store Buffer drain, visibility of written data requires an explicit Cache Sync operation [i.MX 6Dual/6Quad Only] | v |
|
ERR005200 | ARM/MP | ARM/MP: 765569—Prefetcher can cross 4 KB boundary if offset is programmed with |
|
|
ERR005383 | ARM/MP | ARM/MP: 775420—A data cache maintenance operation that aborts, followed by an ISB and without any DSB in-between, might lead to deadlock | v |
|
ERR007006 | ARM/MP | ARM/MP:794072-- Short loop including a DMB instruction might cause a denial of |
| v |
ERR009604 | ARM (CA9) | ARM (CA9): 845369 — Under very rare timing circumstances, transition into streaming mode might create a data corruption |
| x |
ERR009605 | ARM (CA9) | ARM (CA9): 761320—Full cache line writes to the same memory region from at least two processors might deadlock the processor |
| v |
ERR006223 | CCM | CCM: Failure to resume from Wait/Stop mode with power gating |
|
|
ERR007265 | CCM | CCM: When improper low-power sequence is used, the SoC enters low power mode before the ARM core executes WFI | v |
|
ERR009219 | CCM | CCM: Asynchronous clock switching can cause unpredictable behavior [i.MX6 Dual/6Quad Only] |
|
|
ERR009165 | eCSPI | eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to be sent twice | v |
|
ERR006358 | ENET | ENET: Write to Transmit Descriptor Active Register (ENET_TDAR) is ignored | v |
|
ERR006687 | ENET | ENET: Only the ENET wake-up interrupt request can wake the system from Wait | v |
|
ERR004323 | HDMI | HDMI: The DMA burst read transaction address region is limited to 8 KB | v |
|
ERR005171 | HDMI | HDMI: HDMI Tx audio may have noise due to audio DMA FIFO overflow | v |
|
ERR005173 | HDMI | HDMI: Clarification on HDMI programming procedure to avoid FIFO overflow | v |
|
ERR005174 | HDMI | HDMI: HDMI AHB Audio DMA stream misalignment on system initialization |
|
|
ERR004366 | HDMI | HDMI: 9000482480—ARM core read operation returns incorrect data for certain HDCP registers |
|
|
ERR009623 | IPU | IPU: IDMAC burst errors when crossing a 4k boundary using NI/PI 420/422 formats [i.MX 6DualPlus/6QuadPlus Only] |
|
|
ERR005193 | MIPI | MIPI: Corruption of short command packets with Word Count (WC) greater than 16’hFFEE, during video mode transmission by the MIPI Generic Interface |
|
|
ERR005778 | MMDC | MMDC: DDR Controller’s measure unit may return an incorrect value when operating below 100 MHz |
|
|
ERR005184 | PCIe | PCIe: Clock pointers can lose sync during clock rate changes |
|
|
ERR008587 | PCIe | PCIe: Random link down after warm reset [i.MX 6Dual/6Quad Only] | v |
|
ERR009619 | PRE | PRE: GPU3D, GPU2D and VPU cannot be power-gated if the PRE is in use [i.MX 6DualPlus/6QuadPlus Only] |
|
|
ERR009624 | PRE | PRE: ENABLE bit cannot be set in a special case, when the EN_REPEAT bit is set [i.MX 6DualPlus/6QuadPlus Only] |
|
|
ERR007266 | ROM | ROM: EIM NOR boot may fail if plug-in is used |
|
|
ERR007966 | SATA | SATA:SATA speed negotiation fails after suspend and resume —[i.MX 6Dual/6Quad Only] |
|
|
ERR009598 | SATA | SATA: PRD not flushed from PRD FIFO at command list underflow |
|
|
ERR008990 | SSI | SSI: Channel swap in single FIFO mode when an underrun or overrun occurs |
|
|
ERR004534 | USB | USB: Wrong HS disconnection may be generated after resume |
|
|
ERR006308 | USB | USB: Host non-doubleword –aligned buffer address can cause host to hang on OUT Retry |
|
|
ERR004535 | VPU | VPU: Wrong interrupt is generated sometimes when context switching to H.264 |
|
|
ERR007881 | USB | USB: Timeout error in Device mode |
|
|
ERR004345 | USB | USB: USB suspend and resume flow clarifications |
|
|
ERR004363 | VPU | VPU: Causes a macro-block of P-picture decoding error |
|
|
ERR004346 | WDOG | WDOG: WDOG SRS bit requires to be written twice | v |
|
Hi Ken
kernel 4.8 and u-boot 2016.10 are not supported by nxp, nxp official bsps located on link
and errata status is described in Errata document as "Linux BSP Status" for each item i.MX6DQ Errata
http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
Please check difference between NXP(FSL) official BSP and NXP(FSL) community BSP
https://community.freescale.com/message/402940#402940
For kernel 4.8 one can post on mainline kernel mail list.
================================================================
Best regards
igor
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