TEMPMON of i.MX6SLX

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takashitakahash
Contributor III

HI community.

Our customer has question below.

This is a question about TEMPMON.

IMX6SXRM "the TEMPMON memory map are description in" Page 4056 of 63.3 but not in this description of the specifications of TEMPMON_TEMPSENSEx_SET , TEMPMON_TEMPSENSEx_CLR, and TEMPMON_TEMPSENSEx_TOG.

For those, please inform me.

Thanks,

Best.

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igorpadykov
NXP Employee
NXP Employee

Hi Takashi

register TEMPMON_TEMPSENSE is described in sect.

63.3.1 Tempsensor Control Register 0 (TEMPMON_TEMPSENSE0n).

Meaning of other registers are the same as TEMPMON_TEMPSENSE:

_SET - set specific bit in TEMPMON_TEMPSENSE

_CLR - clears bit

_TOG - toggle bit

Best regards

igor

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igorpadykov
NXP Employee
NXP Employee

Hi Takashi

register TEMPMON_TEMPSENSE is described in sect.

63.3.1 Tempsensor Control Register 0 (TEMPMON_TEMPSENSE0n).

Meaning of other registers are the same as TEMPMON_TEMPSENSE:

_SET - set specific bit in TEMPMON_TEMPSENSE

_CLR - clears bit

_TOG - toggle bit

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

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takashitakahash
Contributor III

Hi  igor.

thank you for your answer.

Please tell me an additional

My understanding is each registers are  Bit Field configuration is the same and according to Address change.

Could you tell me a specific example of the example of use or value of each Register.

Thanks,

Best.

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igorpadykov
NXP Employee
NXP Employee

Hi Takashi

understanding is correct, examples can be found in SDK, attached

is imx_uart.c for uart.

Best regards

igor

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takashitakahash
Contributor III

Hi igor

Thank you for your reply.

Thanks,

Best.

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