Dear all,
We want to enable the Spread spectrum modulation for DCLK of the LCD.
We observed a waveform by using spectrum analyzer.
LDB_DI0_CLK_SEL=PLL2 PFD3
CCM_CS2CDR: 0x020C402C = 0x0055B6EF
【SSCG-ON】Spread spectrum modulation enabled
CCM_ANALOG_PLL_SYSn: 0x020C8030 = 0x80002001
CCM_ANALOG_PLL_SYS_SS: 0x020C8040 = 0x05DC8006
CCM_ANALOG_PLL_SYS_DENOM: 0x020C8060 = 0x00000012
【SSCG-ON + DENOM setting】Spread spectrum modulation enabled + Denominator setting
CCM_ANALOG_PLL_SYSn: 0x020C8030 = 0x80002001
CCM_ANALOG_PLL_SYS_SS: 0x020C8040 = 0x05DC8006
CCM_ANALOG_PLL_SYS_DENOM: 0x020C8060 = 0x00001770
【SSCG-OFF】Spread spectrum modulation disabled
CCM_ANALOG_PLL_SYSn: 0x020C8030 = 0x80002001
CCM_ANALOG_PLL_SYS_SS: 0x020C8040 = 0x05DC0006
CCM_ANALOG_PLL_SYS_DENOM: 0x020C8060 = 0x00000012
We suspect that setting is not enough
Is there a more necessary setting?
These setting is set by the imx6ul_clocks_init() function in the clk-imx6ul.c file of Yocto Linux BSP.
Should these registers be set in U-Boot too?
May I have advice?
Best Regards,
Yuuki
Solved! Go to Solution.
Your Case #2 should work well producing the frequency deviation range of 6MHz and frequency modulation rate of 24kHz. Please note that you first have to set up the CCM_ANALOG_PLL_SYS_DENOM register and STOP and STEP fields of the CCM_ANALOG_PLL_SYS_SS register and only after that set the CCM_ANALOG_PLL_SYS_SS[ENABLE] bit. With other sequence, the spread spectrum function may not start properly.
Have a great day,
Artur
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Your Case #2 should work well producing the frequency deviation range of 6MHz and frequency modulation rate of 24kHz. Please note that you first have to set up the CCM_ANALOG_PLL_SYS_DENOM register and STOP and STEP fields of the CCM_ANALOG_PLL_SYS_SS register and only after that set the CCM_ANALOG_PLL_SYS_SS[ENABLE] bit. With other sequence, the spread spectrum function may not start properly.
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Dear Artur-san,
Thank you for your support.
I'm sorry, we found it having got a wrong setting
We set PLL3 as a clock source for the LDB module.
I was able to confirm Spread spectrum by setting PLL2.
Best Regards,
Yuuki