Spansion Quad SPI driver with i.MX283

[JAlvarez]

I am considering a quad SPI flash for an i.MX283 design. The intent is to use it as a boot device with the kernel and a small boot filesystem, similar to the layout described in Bacem Daassi's presentation (i.MX28_Building_Blocks.pptx).

1. Does the Spansion quad SPI driver implement 32-bit addressing to support devices larger than 16MB? The instructions list up to 16MB devices (S25FL129P) which may imply 24-bit addressing.

2. Does the driver support a read-write filesystem?

3. Has the Spansion driver been updated to support 3.x kernels?

4. The datasheet for the Spansion S25FL128S and S25FL256S specify a hybrid sector size where the first and last 64KB sectors can be erased in 4KB blocks. What is the purpose of using different erase block sizes? Sectors on most flash devices are symmetric and use uniform erase block sizes.

Thanks.

[JAlvarez]

Thanks for your response. I'll request the driver via email. Spansion should consider posting the driver to the kernel mailing lists to be considered for the mainline distribution.

What seems peculiar about 4KB erase blocks is the asymmetric flash organization, e.g. implementing the smaller blocks only in the first and last 64K sectors. Besides bootloaders, standalone applications may also need to optimize space throughout the whole address space, not just the first and last sectors. Quad SPI components from other vendors support 4K erase blocks on all sectors.

[GernotHoyler · Accepted solution]

Hi,

1. We have a newer version of our patch available that includes support of our new S25FL-S devices and automatically enables 4 byte addressing for the larger parts (> 128 Mbit). Please get directly back to me if you are interested in it (Gernot.Hoyler@spansion.com).

2. Yes, our driver(s) support JFFS2 on SPI.

3. Not yet but we can do this if needed.

4. It is for small bootloaders and their parameters. Smaller sectors at the address space boundaries give more flexibility and save space.

Best regards,

Gernot