SGTL5000 INTERFACING WITH SPI THROUGH MSP430F5529

[vcr10feb]

Hello Every one,

Good morning to all

I am using a sgtl5000 in my console mixer project, I have interfacing through spi , Also I have set all the registers of sgtl5000 , but it doesn't respond any thing.

Here i am attaching the code which is written by me pls see and correct where i am wrong , i am using msp430f5529 series controller to interface with sgtl5000.

We have set internally

VDDIO=3.3 V

VDD=1.8 V

AVDD=3.3 V

#include "msp430.h"
static unsigned int A2_results=0,A3_results=0;
void send( unsigned int data,unsigned int i);
void spi_initial();
/* * Register values. */
#define CHIP_ID 0x0000
#define CHIP_ANA_POWER 0x0030
#define CHIP_LINREG_CTRL 0x0026
#define CHIP_REF_CTRL 0x0028
#define CHIP_LINE_OUT_CTRL 0x002C
#define CHIP_SHORT_CTRL 0x003C
#define CHIP_ANA_POWER 0x0030
#define CHIP_DIG_POWER 0x0002
#define CHIP_CLK_CTRL 0x0004
#define CHIP_I2S_CTRL 0x0006
#define CHIP_SSS_CTRL 0x000A
#define DAP_CONTROL 0x0100
#define DAP_AVC_THRESHOLD 0x0126
#define DAP_AVC_ATTACK 0x0128
#define DAP_AVC_DECAY 0x012A
#define DAP_AVC_CTRL 0x0124
#define CHIP_DAC_VOL 0x0010
#define CHIP_LINE_OUT_VOL 0x002e
#define CHIP_ANA_HP_CTRL 0x0022
#define CHIP_ANA_CTRL 0x0024
#define CHIP_CLK_TOP_CTRL 0x0034
#define DAP_MAIN_CHAN 0x0120
#define DAP_MIX_CHAN 0x0122
#define CHIP_PLL_CTRL 0x0032
#define CHIP_ANA_ADC_CTRL 0x0020
#define CHIP_ANA_HP_CTRL 0x0022
#define CHIP_ADCDAC_CTRL 0x000E

void spi_initial()
{
P8SEL |=(BIT1+BIT2);
P8DIR |=(BIT1+BIT2);
UCA1CTL1 |= UCSWRST;
UCA1CTL0 = UCCKPH +UCMSB+ UCMST + UCMODE_1 + UCSYNC;
//UCA1CTL0 |= (UCCKPH + UCCKPL +UCMSB + UCMST + UCMODE_1 + UCSYNC);
//UCA1CTL0 |= (UCCKPH + UCCKPL + UCMST + UCMODE_1 + UCSYNC);
UCA1CTL1 = UCSSEL_2;
UCA1CTL1 &=~UCSWRST;
//UCB2IE |= UCRXIE;
}

void send( unsigned int data,unsigned int i) /*SPI SEND FUNCTION */
{
unsigned int l;
__disable_interrupt();
l=data;
l=l>>8;
while(i){
while(!( UCA1IFG & UCTXIFG));
UCA1TXBUF = l;
l=data;
i--;
}
while(UCA1STAT & UCBUSY);
__enable_interrupt();
}

void uart()
{
P9DIR|=BIT1;
P9OUT&=~BIT1; /// USED WHEN DATA HAS TO BE SEND
P9REN|=BIT1;
P9OUT&=~BIT1;
P9SEL|=BIT2+BIT3; /// TX & RX PIN
UCA2CTL1|=UCSWRST;
UCA2CTL1|=UCSSEL_2;
UCA2BR0= 0xD9;
UCA2CTL1&=~UCSWRST;
}

void adc()
{

P6SEL |= (BIT5+BIT4); //enable A/D channel inputs A0
ADC12CTL0 = ADC12ON+ADC12MSC+ADC12SHT0_2;
ADC12CTL1 = ADC12SHP+ADC12CONSEQ_1;
ADC12MCTL5 = ADC12INCH_5; // ref+=AVcc, channel = A2
ADC12MCTL4 = (ADC12INCH_4+ADC12EOS); // ref+=AVcc, channel = A3
//ADC12IE = 0x0030; // Enable ADC12IFG.0.....ADC12IFG.3

}
void pin_init()
{
P4DIR|=BIT1;
P8DIR|=BIT7;

P4OUT|=BIT1; /// SPI MODE FOR IC 1
P8OUT|=BIT7; /// SPI MODE FOR IC 2

P4DIR|=BIT2;
P4OUT|=BIT2; //// CS PIN FOR IC 1

P9DIR|=BIT0;
P9OUT|=BIT0; /// CS PIN FOR IC 2
}

void main(void)
{
WDTCTL = WDTPW + WDTHOLD;

pin_init();
uart();
spi_initial();
adc();
__enable_interrupt();

P4OUT&=~BIT2; // IC 1
P9OUT&=~BIT0; // IC 2
__delay_cycles(10);
///////////////////// power up //////////////////////
send(CHIP_ANA_POWER,2);
send(0x4260,2);

send(CHIP_LINREG_CTRL,2);
send(0x0008,2);

send(CHIP_ANA_POWER,2);
send(0x7260,2);

send(CHIP_ANA_POWER,2);
send(0x4260,2);

send(CHIP_LINREG_CTRL,2);
send(0x006C,2);

//////////////////////reference volatge and bias current /////////////////////////////

send(CHIP_REF_CTRL,2);
send(0x03EE,2);

send(CHIP_LINE_OUT_CTRL,2);
send(0x0322,2);

///////////////----------------Other Analog Block Configurations------------------
send(CHIP_SHORT_CTRL,2);
send(0x1106,2);

send(CHIP_ANA_CTRL,2);
send(0x0133,2);

///////////----------------Power up Inputs/Outputs/Digital Blocks-------------
send(CHIP_ANA_POWER,2);
send(0x6AFF,2);

send(CHIP_DIG_POWER,2);
send(0x0073,2);

//////////////////--------------------Set LINEOUT Volume Level-----------------------
send(CHIP_LINE_OUT_VOL,2);
send(0x0505,2);

////////// Configure SYS_FS clock to 48kHz Configure MCLK_FREQ to 256*Fs

send(CHIP_CLK_CTRL,2);
send(0x0008,2);

send(CHIP_I2S_CTRL,2);
send(0x0093,2);

////////////// Input/Output Routing //////////////
send(CHIP_SSS_CTRL,2);
send(0x0173,2);

////////////////Digital Audio Processor Configuration
send(DAP_CONTROL,2);
send(0x0011,2);

send(DAP_MAIN_CHAN,2);
send(0x8000,2);

send(DAP_MIX_CHAN,2);
send(0x4000,2);

////////////////////// Volume Control/////////////////
send(CHIP_ANA_ADC_CTRL,2);
send(0x0000,2);

send(CHIP_ANA_HP_CTRL,2);
send(0x0C18,2);

////////////// LINE OUT and ADC VOLUME /////////////
send(CHIP_ANA_CTRL,2);
send(0x0033,2);

send(CHIP_DAC_VOL,2);
send(0x3C3C,2);

send(CHIP_ADCDAC_CTRL,2);
send(0x0000,2);

send(CHIP_ANA_CTRL,2);
send(0x0032,2);

__delay_cycles(10);
P4OUT|=BIT2;
P9OUT|=BIT0;
while(1)
{

ADC12CTL0 |= ADC12ENC; // Enable conversions
ADC12CTL0 |= ADC12SC;
A2_results += ADC12MEM4;
A3_results += ADC12MEM5;

}
}

[igorpadykov]

Hi vikash

one can look at sgtl5000 initialization and programming examples in

http://cache.freescale.com/files/analog/doc/app_note/AN3663.pdf 

Best regards
igor
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