Porting DP83822/DP83825 in IMX7D

[javerv]

Hello,

Good day!

I'm trying to port TI's DP83822 to IMX7D kernel.

I followed the TI instruction from the below link.

ETHERNET-SW Ethernet PHY Linux drivers & tools | TI.com 

However, what I've observed in IMX's driver is that ethernet initialization  all pass through imx7d_enet_phy_init located in mach-imx7d.c

static void __init imx7d_enet_phy_init(void)

{

if (IS_BUILTIN(CONFIG_PHYLIB)) {

phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,

ar8031_phy_fixup);

phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,

bcm54220_phy_fixup);

phy_register_fixup_for_uid(PHY_ID_BCM5422x, 0xffffffff,

bcm54220_phy_fixup);

}

}

Do I need to create phy_register_fixup for DP83822 as well?

Does it mean that everytime I port a new phy IC I need to create phy_register_fixup for that particular IC?

Thanks,

Javer

igorpadykov‌

[jimmychan]

For your reference : https://community.nxp.com/docs/DOC-344485 

[javerv]

Hello Jimmy,

Thanks for sharing the details.

Can you advise what yocto/kernel version it was tested?

Also, how do we identify the PHY address?

        ethphy0: ethernet-phy@1 {    //here '@1' is the PHY address
            compatible = "ethernet-phy-ieee802.3-c22";
            reg = <1>;
        };

Thanks,

Javer

[jimmychan]

I was using L4.9.88 when I wrote this document.

The phy address is on your phy circuit. You can see it on the schematic on my document.

[javerv]

Hello Jimmy,

Thanks. The info helps.

I'm using 4.9-1.0.x-imx kernel.

We were able to detect the PHY upto filesystem.

• However, it cannot gain an IP address.
• Cannot resolve dhclient
• Cannot ping the gateway even setting a static IP.

Using ethtool, I was able to see that the PHY performed autoneg and detected a link from the router.

Further investigation using ethtool shows a high discrepancy between transmit and receive packets.

Also by using ethtool, we observed high rx_crc_errors.

Can you also check if our device tree bindings and PIN declaration are correct?

BTW, we are using external 50Mhz.

pinctrl_enet1: enet1grp {

fsl,pins = <

MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x00000003

MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00000003

MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x00000001

MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x00000001

MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x00000001 // ENET_EN

MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x00000001 // RXER

MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x00000001

MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x00000001

MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x00000001 // CRS

MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1 0x40000001

MX7D_PAD_ENET1_COL__GPIO7_IO15 0x00000001 // PHY PWRDWN

>;

};

&fec1 {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_enet1>;

clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,

<&clks IMX7D_ENET_AXI_ROOT_CLK>,

<&clks IMX7D_ENET1_TIME_ROOT_CLK>,

<&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;

clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";

assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,

<&clks IMX7D_ENET1_TIME_ROOT_CLK>;

assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;

assigned-clock-rates = <0>, <100000000>;

phy-mode = "rmii";

fsl,magic-packet;

phy-handle = <&ethphy0>;

status = "okay";

mdio {

#address-cells = <1>;

#size-cells = <0>;

ethphy0: ethernet-phy@2 {

compatible = "ethernet-phy-ieee802.3-c22";

reg = <2>;

max-speed = <100>;

};

};

};

Hope you can find time checking this. Thanks.

- Javer

[jimmychan]

this may help you

https://community.nxp.com/thread/440985 

[javerv]

Hello Jimmy,

Thank you very much for all the help.

It seems that we also have some misconfiguration on our board.

PHY is now working fine.

-Javer