PWM for MX2

[tainguyen]

Hello,

I am trying to turn on the pwm0 channel in u-boot. I follow the following articles but with limited success.

https://community.freescale.com/message/273292#273292

I am having the same problem as Stefan here https://community.freescale.com/thread/295562

Basically this is what I did:

1) Clear bit 29 to turn off the PWM_CLK24M_GATE.

2) Clear the last bit f the HW_PINCTRL_MUXSEL7 BANK3_PIN16 to drive PWM0.

3) Clear SFTRST and CLKGATE by clearing bits 31 and 30 of the HW_PWM_CTRL.

4) Enable PWM0 by setting bit 0 of the HW_PWM_CTRL.

5) Follow the example thread to sett the ACTIVE0 DC to 0x4B0 or 1200 tick, to make 50% DC.

6) Follow the example thread to sett the PERIOD0 to 0xB095E for 23999 or 1 period for the 24MHz clock.

I have a Piezo hooked up the PWM0. Stefan seems to have the same issue. His post is old so I didn't if it is proper to resurrect it. Does anyone have the same problem? Does anyone know the proper sequence to do this?

Here are the values of the registers when running:

HW_CLKCTRL_XTAL:         0x1

HW_PINCTRL_MUXSEL7: 0x3FFFFF3A

HW_PWM_CTRL:                0x3FC00001

ACTIVE0:                               0x4B0

PERIOD0:                              0xB095E

thanks,

Tai

[jamesbone]

Lets try this order,  that it is just the same but we are doing first the  IOMUX  configuration and in your posting you are missing the  SET ENABLE of the PWM.

>Clear the IOMUX pin

>Clear SFTRST

>Clear CLKGATE

>Clear ENABLE

>Program ACTIVE register

>Program PERIOD register

>Set ENABLE

Are you using the EVK board?

[jamesbone]

I just also notice that you are using the 24Mhz clock and unfortunately there is an ERRATA of the i.MX28

http://cache.freescale.com/files/32bit/doc/errata/IMX28CE.pdf?fsrch=1&sr=1

PWM: Register write sync issue when  HSADC clock frequency is  lower than APBX  clock frequency

Description:

The PWM channel might not generate the required output signal when in HSADC driving mode.

When in HSADC mode, if the HSADC input clock is much lower than the APBX bus clock (for  example APBX Bus clock is 24 MHz and HSADC input clock is 4 MHz) the write signal to the PWM registers is missed. Write access to the following registers has no effect after HSADC mode is enabled:

• PWM Control and Status Register

• PWM Channel Active Register

• PWM Channel

• Period Register

As a result, dedicated PWM  channel is not triggered.

[tainguyen]

James,

Sorry for the late response. I was on vacation.

Thank you for the information. I did get the pwm to work. Our piezo was connected to a different pin. Also, our piezo is low active, so I had to set the period and active value correspondingly.

Tai

[jamesbone]

Excellent!!! :smileywink: