MAX9286+MAX96707

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MAX9286+MAX96707

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dqz
Contributor II

i have some confusion about clock setting and Frame Sync (Manual Mode)
my camera PDCK is 72MHZ
i set :
/* 72MHz pixel clock (1280*800@30fps) * 16 bits per pixel (YUV422) = 1152Mbps mipi data rate for each camera */
        mipi_csi2_reset(mipi_csi2_info, (576 * g_sensor_num) / (lanes + 1));
is it right ?
about Frame Sync (Manual Mode)
max9286_write_reg(0x01, 0x00);
 max9286_write_reg(0x63, 0x00);
 max9286_write_reg(0x64, 0x00);
 max9286_write_reg(0x06, 0xa0);
 max9286_write_reg(0x07, 0x84);
 max9286_write_reg(0x08, 0x81);
 max9286_write_reg(0x0C, 0x99);
how to calculate the calue of  the five registers (0x63,0x64,0x06,0x07,0x08)?
thaks?

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