LVDS signals drive strength

[Mihir2]

Hi NXP team,

We are using i.MX8M Plus for our custom design.

While validating eye-diagram testing, we observed that signal has higher over-shoot and pre-shoot. Due to that signal gets distorted.

Is there any option to modify drive strength of LVDS clock and data lines?

Thank you in advance !

Regards,

Mihir

[AndreasMaquet]

Hello Igor, or NXP team!

I have the same question regarding this, using i.MX8QM. It's of most urgent need for us to get an answer since we are quickly coming up to a deadline and the LVDS is giving us EMC emission troubles. 

And, no we have no problems with layout, in fact it's the cable between our PCB and the TFT which is hard to shield good. Less driver strength within LVDS spec. would be very, very helpful.

Thanks in advance!

[Mihir2]

Hello @AndreasMaquet ,

We are experimenting drive strength for LVDS signals, using details shared by NXP over email.

During our experiment, we also observed that we had a parallel termination of 100 Ohms between P and N lines (mounted on display side and not on our board). We removed those termination resistors and our signal distortion gets reduced and eye-diagram quality is improved.

Hope this helps!

Thanks,

Mihir 

[vedantteksun]

Hi Team NXP, Mihir,
Could you please share the same details with us that how you have change the drive strength? We are currently working on to reduce EMC emission. Please also provide your other valuable inputs to reduce EMC emission for LVDS.

[Mihir2]

Hello NXP team,

We have 100 ohms parallel termination resistors mounted on destination side on all 5 differential pairs. We removed those resistors and re-measured eye-diagram pattern. Overall signal quality gets improved and eye-diagram opening is better compared to previous one. Our signal quality distortion issue looks like resolved.

We have not changed any LVDS drive strength on our board.

I hope this helps other NXP member as well!!

Thanks and Regards,

Mihir 

[AndreasMaquet]

Hello Mihir!

As a designer I would say that you then have 100 ohm termination already inside the receiver chip and that those extra redundant 100 ohm resistors made your termination to 50 ohms, which is bad for signal integrity and current rush. 

I've received the information from NXP now and I can get a reduction of around 5 dB emitted when pulling down driver strength. Every little helps...

[AndreasMaquet]

Thanks for your reply!

I'm still looking forward for NXPs answer though. 

BR/
Andreas

[igorpadykov]

Hi Mihir

additional details were sent via mail.

Best regards
igor

[don_gunn]

Could I please get these details on reducing drive strength on the LVDS interface of the MX8M Plus?  we have enabled spread spectrum on the LVDS clock which has helped with emmissions be we are still too high.

Don

[yogeshbsa89]

Hi Igor/ NXP Community,

We are also facing emission issues in IMX8M+  from the Custom Lvds based display. by reducing pixel clock frequency to lower value (from 71 Mhz to 47 Mhz), it is improving to the Marginal level.

But it reduces frame rate as well. it is not so desired .

Now we are thinking alternative solution to control the emission by controlling LVDS drive strength.

Could you help in controlling LVDS drive strength. we are using 5.15 Linux Kernel.   

How we can we check current drive strength of lvds signals ?

Regards,

Yogesh

[mhammouda]

Hi Igor,

 please, can you share with me how to configure drive strength for lvds signals? I'm in the same situation.

[AndreasMaquet]

(I think I replied to the wrong post up here...)

Hello Igor, or NXP team!

I have the same question regarding this, using i.MX8QM. It's of most urgent need for us to get an answer since we are quickly coming up to a deadline and the LVDS is giving us EMC emission troubles. 

And, no we have no problems with layout, in fact it's the cable between our PCB and the TFT which is hard to shield good. Less driver strength within LVDS spec. would be very, very helpful.

Thanks in advance!