Internal ring oscillator affect operation of MMDC?

[norihiromichiga]

Hello NXP team,

On i.MX6Q, we don't need accurate timing for RTC, so we left open Xtal input for RTC. 

In this configuration, we understand that the internal ring oscillator is used. 

With this configuration, we faced strange issue on i.MX6Q.  

We found that our application software performance got lowered during certain temperature of die. 

(We measured the die temperature with integrated temp sensor of i.MX6Q)

According to internal register information, the busy counter of MMDC is higher when this issue is seen.

DDR memory access itself is fine, so we don't if the high busy counter value caused this issue.

And this problem is not seen on every board we assembled. So, we did A-B/B-A test (swapping i.MX6 between known good board and the board which showed this performance issue), then, issue seems to be depending on specific i.MX6. 

After our thorough investigation on this specific i.MX6, we found out that the performance issue was completely gone, when we just added x'tal for internal RTC to our board.

According to local FAE of NXP Japan, he told us that it was possible because the refresh timer referred to the low speed clock from internal ring oscillator.  

Our question is:

1. Must we use xtal for RTC so that MMDC works stably, if internal ring oscillator caused the issue we faced?

2. Could you advise us what modules on this SoC uses the internal ring oscillator other than MMDC and RTC?

Thanks,

Norihiro Michigami

AVNET

[norihiromichiga]

Hello Igor, 

Thank you for your reply. I confirmed the document you suggested.

Thanks,

Norihiro Michigami

[igorpadykov · Accepted solution]

Hi Norihiro 

1.

-accuracy of on-chip 40 kHz internal oscillator is ± 50%, as described in

i.MX6 System Development User’s Guide Table 2-7. Oscillator and clock recommendations

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf

So user must carefully check all ddr datasheet timings when using it. Probably to avoid

unpredictable issues with this parameter, one can use crystal.

- some ddrs require tREFI dependancy from temperature, from datsheet MT41K128M16 :

"The refresh period is 64ms when TC is less than or equal to 85°C.

When TC is greater than 85°C, the refresh period is 32ms."

2. please check i.MX6DQ Reference Manual CCM chapter and check which modules

may have clock from RTC, look for "clk_32k", "ckil" clock names

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

Best regards
igor
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