hi,
1:when the IMX6Q booting,it can not link up the PCI device-TW6869,the log is follow:
Bluetooth: Core ver 2.16
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
cfg80211: Calling CRDA to update world regulatory domain
pureg-dummy: no parameters
Switching to clocksource mxc_timer1
imx6q-pcie 1ffc000.pcie: missing *config* reg space
imx6q-pcie 1ffc000.pcie: phy link never came up
imx6q-pcie 1ffc000.pcie: failed to initialize host
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP: reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
2:when booting,IMX6Q can send PCIE_CLK and TX to TW6869,but the TW6869 can only output 240mV PCIE data to IMX6Q's PCIE_RX,then,IMX6Q stop the P[CIE_CLK and TX to TW6869,and logout fail.
the affix includes sch.
Chinese:
您好,
1:我们现在使用IMX6Q连接一个外部的PCIE芯片TW6869,IMX6Q在boot中提示不能LINK UPPCIE设备,如下:
imx6q-pcie 1ffc000.pcie: phy link never came up
imx6q-pcie 1ffc000.pcie: failed to initialize host
2:IMX6Q启动后,会有个瞬间,IMX6Q发送PCIE CLK和TX数据给TW6869,我们的板子TW6869会发个240mV的直流电平出来给IMX6Q的PCIE_RX(感觉正常的情况应该是TW6869发送有摆幅交流信号的PCIE数据给IMX6Q),之后BOOT提示不能LINK UP外设TW6869,之后IMX6Q就停止发送PCIE CLK和TX。
Hi 翔 李
please try latest BSP L3.14.28_1.0.0_iMX6QDLS_BUNDLE
and test link-up with several different cards. Also check that C340,341,C325,C326,
R324,R325 in your schematic are placed close to TW6889, it may be recommended
to check hints at
PCI Express "phy never came up" with BSP 3.10.17_1.0.2-GA, custom board
AN4784 AN4784: PCIe Certification Guide for i.MX 6Dual/6Quad and i.MX 6Solo/6DualLite - Application Note
describes how one can check and analyze PCIe interface signals
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
HI,
thanks.
1:where does the 0.1uF close place with the PCIE_RX in sch_pdf of TW6869?
2:is it relate to Silicon revision? i use MCIMX6Q5EYM10AD in my board, and it can not link up pcie device(TW6869),but last board i used MCIMX6Q5EYM10AC,it can link up TW6869.
3:is it differenet in software and hardware between Silicon revision C and D?
1. capacitors should be placed near TW6869
2. no, difference can be explained that board has small margin regarding
signal quality (or board signal/noise ratio)
3. no