How to design system with DDR3L to support ECC feature.

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How to design system with DDR3L to support ECC feature.

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双朋赵
Contributor III

Hi Dylen Chen,

we need to support functional safety in ASIL-B level on our HD-MAP ECU product,
 
so we plan to enable the DDR ECC feature in design, can you provide us some detailed design demo or documents and help us to achieve it.
 
Thanks
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4 Replies

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jean-francois_h
Contributor I

Hi,

I would be interested in the schematics mentioned above : "DDR related SCH for 8QXP DDR3L (3x Micron 32 Meg x 16 x 8banks Automotive grade with ECC) Board ". Can I get these schematics ? Are there other documents I could use ? Please let me know.

Best regards,

JF Hasson

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dylan_chen
NXP Employee
NXP Employee

Hi Shuangpeng,

 

I can provide DDR related SCH for 8QXP DDR3L (3x Micron 32 Meg x 16 x 8banks Automotive grade with ECC) Board just help for your design reference. DDR3L board’s validation are not fully tested, so it will take more time for SW/Test team to release the test report.

Regards,

Dylan

dylan.chen@nxp.com

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双朋赵
Contributor III

Hi Dylen,

Thanks for your design reference, we will design our product based on your help.
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weidong_sun
NXP TechSupport
NXP TechSupport

In addition, in SCFW , there is DDR ECC script for it's configuration.

Weidong

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