Hello,
I am using IMX8M MINI EVK with L5.4.47-2.2.0 release. I am integrating a 3rd party image sensor on the EVK. This sensor requires 48MHz mclk or 50MHz mclk input.
For this I want to configure CLKO1 as 48MHz or 50MHz, but I am unable to do so.
Below is the dts node for the camera sensor. I have modified the "assigned-clock-rates" and "mclk" to 48MHz.
camera: camera@3c {
compatible = "csi, camera";
reg = <0x3c>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_camera_rst>;
reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MM_CLK_CLKO1>;
clock-names = "csi_mclk";
assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
assigned-clock-rates = <48000000>;
mclk = <48000000>;
port {
camera_ep: endpoint {
remote-endpoint = <&mipi1_sensor_ep>;
};
};
};
When I measure the clock using oscilloscope I get 24MHz only.
When change the "assigned-clock-rates" and "mclk" to 12MHz, I get 12MHz clock on oscilloscope.
Please help to suggest what I am missing in changing the CLKO1 value.
How can I set CLKO1 to 48MHz or 50MHz rate?
Regards,
Naman
Hi @namanthaker,
Perhaps, you could try to change the clock source for assigned-clock-parents from the dts node that you attached. According to table 5-1. Clock Root Table from Processor's reference manual, the CLKO1 has eight sources:
Each source has a different frequency assigned which is described in table 5.1.5.1 Input Clocks. You can also find the definitions for clock sources that may be used as assigned-clock-parents in imx8mm-clock.h:
include/dt-bindings/clock/imx8mm-clock.h
Hope this helps!
Regards,
Ruben
Hi @nxf54947,
Thank you for your suggestion!
I tried different clock sources and got constant 50Mhz by using SYSTEM_PLL1_DIV4(IMX8MM_SYS_PLL1_200M in the DTS) as parent clock. But now I am getting a strange issue.
When I set the clock parent to SYSTEM_PLL1_DIV4 for 50Mhz CLKO1, I am unable to perform I2C R/W transaction with the camera.
I am using I2C3 (same as OV5640 on i.MX8MM) for communicating with the camera.
I measured the SCL and observed that the clock rate does not remain constant at 100Khz (as set in the DTS), but instead jumps to approx. 50Mhz intermittently.
When I set clock rate at 24Mhz with SYSTEM_PLL1_DIV4 as parent clock, the SCL remains constant at 100Khz and I am able to perform I2C R/W operation on camera successfully.
The updated DTS node looks like this:
&i2c3 {
camera: camera@3c {
compatible = "camera";
reg = <0x3c>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_camera_rst>;
reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MM_CLK_CLKO1>;
clock-names = "csi_mclk";
assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_200M>;
assigned-clock-rates = <50000000>;
mclk = <50000000>; // unused property
port {
camera_ep: endpoint {
remote-endpoint = <&mipi1_sensor_ep>;
};
};
};
};
I have attached the clock summary for reference.
I don't see any relation between I2C3_ROOT_CLK and IMX8MM_CLK_CLKO1 to cause such an issue.
What could be causing such effect? Am I supposed to modify something else along with the assigned-clock-parents which I might have missed?
Regards,
Naman
According to the datasheet of the OV5640, the input clock is 6-27MHz.
I am using a 3rd party sensor which supports 10-54Mhz MCLK range.
The sensor vendor suggests to use 48Mhz or 50Mhz as those clocks are very well verified with the sensor.