How to adjust parameters of PCIe_PHY by changing the IOMUXC_GPR8 register ??

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How to adjust parameters of PCIe_PHY by changing the IOMUXC_GPR8 register ??

Contributor V

Hi All


I already read AN4784 document, but it did not help us a lot since I don't have the measure equipment to process the Sig test. I couldn't find any explanation on how to configure IOMUXC_GPR8 fields without following AN4784 procedure, which is very cost effective when I does't have the measure equipment like 20GHz oscilloscope.


1) Can you explain me how each field of IOMUXC_GPR8 modifies PHY Tx timings/levels ?


As an example what are the values I can use for following ? Instead to using 127 for bit 25 what we can use as other values ? Can you tell me the values I can test with for PCIE GEN 1 by changing DEEMPH_GEN1, TX_SWING_FUL and TX_SWING_LOW. 


imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8);
imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8);
imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8);
imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8);
imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8);


2) Let's say we are using Sig test then how we can use test measurements to change this 127 value ? How you get this value with sig tool measurements ?



3) If I'm using /unit_tests/memtool -32 0x020e0020= FFFD4000 memtool what values I can try instead of FFFD4000 ?


Thank you for your support.



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NXP TechSupport
NXP TechSupport

Hi Peter

in general NXP can help customers with sertifications own products using Professional Services

where high skilled professionals can teach step by step all necessary procedures.

NXP Professional Services|NXP 

Note if signal is weak due to improper layout or low quality board material, it is not possible

to compensate signal level by any software changes in GPR8.


Best regards
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