GPIO Pulldown IMX6SL

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

GPIO Pulldown IMX6SL

Jump to solution
1,075 Views
stephangm
Contributor I

How can I set a GPIO pin to be a pulldown without using an external resistor?

Labels (3)
0 Kudos
Reply
1 Solution
818 Views
art
NXP Employee
NXP Employee

An internal 100kOhm pull-down resistor can be enabled on most of GPIO pins by appropriately configuring the corresponding IOMUXC_SW_PAD_CTL_PAD_<xxx> register, where <xxx> is the corresponding pin name. The sequence is as follows.

1. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUS] bits to 0b00 to select the 100kOhm pull-down resistor.

2. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUE] bit to 1 to enable the pull resistor (not a keeper circuit).

3. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PKE] bit to 1 to physically enable the pull resistor.

For more information, refer to the Chapter 30 "IOMUX Controller (IOMUXC)" of the i.MX6SoloLite Reference Manual Rev.2 document, available on the i.MX6SoloLite Documentation web page:

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...


Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
Reply
2 Replies
819 Views
art
NXP Employee
NXP Employee

An internal 100kOhm pull-down resistor can be enabled on most of GPIO pins by appropriately configuring the corresponding IOMUXC_SW_PAD_CTL_PAD_<xxx> register, where <xxx> is the corresponding pin name. The sequence is as follows.

1. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUS] bits to 0b00 to select the 100kOhm pull-down resistor.

2. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUE] bit to 1 to enable the pull resistor (not a keeper circuit).

3. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PKE] bit to 1 to physically enable the pull resistor.

For more information, refer to the Chapter 30 "IOMUX Controller (IOMUXC)" of the i.MX6SoloLite Reference Manual Rev.2 document, available on the i.MX6SoloLite Documentation web page:

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...


Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos
Reply
818 Views
Carlos_Musich
NXP Employee
NXP Employee

Hi Stephan,

do you want to do it in bareboard code? Modifying directly the registers? In this case you must check the Pad Control Register (IOMUXC_SW_PAD_CTL_PAD_AUD_MCLK). Here you will find the following options for a pin:

00 100K_OHM_PD — 100K Ohm Pull Down

01 47K_OHM_PU — 47K Ohm Pull Up

10 100K_OHM_PU — 100K Ohm Pull Up

11 22K_OHM_PU — 22K Ohm Pull Up

If this is not what you are looking for please let me know details of what you need to configure so I can provide more details.


Regads,
Carlos

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos
Reply