Documentation for security features of i.MX 8m

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Documentation for security features of i.MX 8m

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yuji2yuji
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I'm looking for documentation for the security features such as OCRAM, CSU, and TZASC of i.mx 8m processor.

 

Those features will be used for building TEE so I need to know how to set up the memory-mapped registers of such TrustZone-related features.

 

If the documents are not available, any source code that leverages such features would be greatly helpful for reference. Currently, I'm using a google coral board.

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jimmychan
NXP TechSupport
NXP TechSupport
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