DDR TOOL hangs with iMX8MM board

[hongtao_li]

Hi support,

I am developping a iMX8mm board, when I run the ddr tool V3.20, it hangs below.

My PMIC is PCA9450AHN, and the uart configuration is correct.

How can I debug it?

Thanks.

[hongtao_li]

I also measured the uart2 tx, rx pin, there are no signals on them.

[hongtao_li]

Yes, I just follow the spl pmic setting for PCA9450, but it still hangs there, I will measure the PCA9450 signal. Another question, should I change the ddr firmware in the ddr test tool as below? 

[BiyongSUN]

The pmic pca9450, the otp setttings already can work for LPDDR4. 

Here is the demo, change the uart to uart3.

The board is  i.MX8MM  pca9450  evk. 

Please make sure you connect the TX to RX and RX to TX for those two sides.

--- mscale_ddr_tool _v3.20\script\mx8mm\mx8mm_micron_lpddr4_2gb_2d_1500m_200m_50m_32bit_1cs_RPAv16.ds.orig
+++ mscale_ddr_tool _v3.20\script\mx8mm\mx8mm_micron_lpddr4_2gb_2d_1500m_200m_50m_32bit_1cs_RPAv16_uart3.ds
@@ -16,12 +16,13 @@
################step 0: configure debug uart port. Assumes use of UART IO Pads. #####
##### If using non-UART pads (i.e. using other pads to mux out the UART signals), #####
##### then it is up to the user to overwrite the following IO register settings #####
-memory set 0x3033023C 32 0x00000000 #IOMUXC_SW_MUX_UART2_RXD
-memory set 0x30330240 32 0x00000000 #IOMUXC_SW_MUX_UART2_TXD
-memory set 0x303304A4 32 0x0000000E #IOMUXC_SW_PAD_UART2_RXD
-memory set 0x303304A8 32 0x0000000E #IOMUXC_SW_PAD_UART2_TXD
-memory set 0x303304FC 32 0x00000000 #IOMUXC_SW_MUX_UART2_SEL_RXD
-sysparam set debug_uart 1 #UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)
+memory set 0x303301F4 32 0x00000001 #IOMUXC_SW_MUX_ECSPI1_SCLK
+memory set 0x303301F8 32 0x00000001 #IOMUXC_SW_MUX_ECSPI1_MOSI
+memory set 0x3033045C 32 0x0000000E #IOMUXC_SW_PAD_ECSPI1_SCLK
+memory set 0x30330460 32 0x0000000E #IOMUXC_SW_PAD_ECSPI1_MOSI
+memory set 0x30330504 32 0x00000000 #IOMUXC_SW_MUX_UART3_SEL_RXD
+
+sysparam set debug_uart 2 #UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)

################step 1: DDR clock configuration################
memory set 0x30391000 32 0x8F00003F #SRC_DDRC_RCR_ADDR: assert [0]ddr1_preset_n, [1]ddr1_core_reset_n, [2]ddr1_phy_reset, [3]ddr1_phy_pwrokin_n, [4]src_system_rst_b!

[hongtao_li]

Thanks. Do I need to flash the spl,uboot,kernel to the boot device  before running ddr tool?