Can LCDIF and LDB2 display on same time?

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Can LCDIF and LDB2 display on same time?

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jordonwu
Contributor III

Hello all,

My test env:

HW: iMX8QXP MEK revB board

        iMX-lvds-hdmi connect to MEK board DSI1/LVDS1 sock

SW: yocto branch imx-linux-zeus  with manifest imx-5.4.3-2.0.0.xml 

1. flash binary to mek board

2. on u-boot set fdt_file to imx8qxp-mek.dtb

3. the hdmi display can show normal content

4. on u-boot change fdt_file to imx8qxp-mek-dpu-lcdif.dtb and reboot

5. the hdmi display no any output

6. check the output log and find ldb1 and ldb2 and display@disp1 all bound success. (pls see attached file for details)

I check imx8qxp-ss-dc.dtsi file, dpu_disp1_lcdif and ldb2_chx are all belong to dpu_disp1 port (mipi dsi1 ?).

My question:

1) Does ldb2 and lcdif (dpu_disp1_lcdif) can display on same time ? 

2) If not, how to display  dpu_disp1_lcdif (parallel lcdif) and ldb2 (DSI1 port) on the same time?

Thanks.

======================================================================

[ 3.458586] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 3.465235] [drm] No driver support for vblank timestamp query.
[ 3.471248] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[ 3.479543] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[ 3.486945] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)

[ 3.494572] imx-drm display-subsystem: bound bus@56220000:ldb@562210e0 (ops imx_ldb_ops)
[ 3.502718] imx-drm display-subsystem: bound 56228000.dsi_host (ops nwl_dsi_component_ops)


[ 3.511160] imx-drm display-subsystem: bound bus@56220000:ldb@562410e0 (ops imx_ldb_ops)
[ 3.519299] imx-drm display-subsystem: bound 56248000.dsi_host (ops nwl_dsi_component_ops)

[ 3.527705] imx-drm display-subsystem: bound display@disp1 (ops imx_lmuxd_ops)
[ 3.535567] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 0

==========================================imx8qxp-ss-dc.dtsi===================

......

 dpu_disp1: port@1 {   reg = <1>;    dpu_disp1_ldb2_ch0: endpoint@0 {    remote-endpoint = <&ldb2_ch0>;   };    dpu_disp1_ldb2_ch1: endpoint@1 {    remote-endpoint = <&ldb2_ch1>;   };    dpu_disp1_mipi_dsi: endpoint@2 {    remote-endpoint = <&mipi1_dsi_in>;   };    dpu_disp1_lcdif: endpoint@3 {   };  };

......

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igorpadykov
NXP Employee
NXP Employee

Hi Ping

in general yes this is possible one can look at sect.15.1

Display, Imaging, and Camera Overview, Figure 15-1. Interconnection Diagram,

sect.15.1.2.2 MIPI-DSI/LVDS Subsystem

i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual

Best regards
igor
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