After using Yocto Kirkstone 5.15.71 kernel, kernel keep reporting 'ddrc freq' switch on IMX8MINI

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After using Yocto Kirkstone 5.15.71 kernel, kernel keep reporting 'ddrc freq' switch on IMX8MINI

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13614278
Contributor III

We're using IMX8MINI, 2GB DDR4 + 8GB EMMC, when we are using Yocto Kirkstone, we found the kernel(5.15.71) keep reporting below mesg:

```

kernel: ddrc freq set to low bus mode
kernel: ddrc freq set to high bus mode
kernel: ddrc freq set to low bus mode
kernel: ddrc freq set to high bus mode

```

We didn't find such issue on Yocto sumo 4.14-kernel. And we found similar report on the community forum, unfortunately we didn't find any useful tip or info.

Our questions are:

Question-1) Does such ddrc-freq switch make sense? Can we consider it as a good case, or a bad case? i.e, can we safely ignore such kernel report ?

Question-2) If this is bad case, how can we to fix this? Because we didn't meet this issue on Yocto sumo.

 

Really appreciate the answer of above 2 questions. Thank you very much

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hello,

 

A1) You should ignore this error.

A2) This is bad case and mean that the DDR is inconsistent, but you said that works on sumo, please make sure that DDR stress test pass and all calibration is done correctly.

 

Regards

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13614278
Contributor III

Thank you for your help.

After I replace the ddr4_timing.c with the one from DDR Training Tool, we can't even flash the image, it report traning failed:

-------------

U-Boot SPL 2022.04 (Jun 16 2023 - 13:47:35 +0800)
power_bd71837_init
DDRINFO: start DRAM init
DDRINFO: DRAM rate 2400MTS
Training FAILED

-------------

I have confirmed all Stress Test has past, and the file is generated succesfully. (I've already did ddr4_timing.c before successfully on our Yocto sumo 4.14, I write this to express that there's no error steps for generate the ddr4_timing.c)

Could you give us some advice for this?

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