Hi Hideo
for reset most reliable way is to use CPU WDOG_B Reset signal described on p.11
SPF-46368 schematic
Best regards
igor
Thank you, igor.
I understand.
Assertion of WDOG_B by clearing the bit <5> WDA of the 16-bit register WDOG1_WCR at 0x30280000 reseted and successfully restarted the whole system.
Is this register accessible by M7 core as well? M7 seems freezed after accessing the register WDOG1_WCR.
Best regards
Hideo
Hi Hideo
one can try to set WDOG1 RDC permission for M7 core in
Best regards
igor
Thank you, igor.
I'll look into the code.