i.MX8MNano (m815S) DDR Register Programming Aid (RPA)

[#1]

This is a detailed programming aid for the registers associated with i.MX 8MNano (m815S) DDR initialization.  For more details, refer to the main mScale DDR tools page:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/110...

Please note that this page is only intended to store the RPA spreadsheets. For questions, please create a new community thread.

[Rodrigue]

Hi @jan_spurek ,

May you please indicate some details with respect to the second Frequency Point?

How is this handled by the DDR Stress test?

As far as I understand the tool only check the calibration around one frequency point since it only verifies against a typical DDR register setting.

Or just there for further helping validating the design at lower bus frequency with the vTSA tool?

Thanks and best regards

[jan_spurek]

Hello @Rodrigue ,

in case of the mScale processors, the training is performed for each of the frequency points - there are separate register sets that hold the calibration values for each frequency.

Please note that this page is only meant to store the RPAs. For the future questions about the RPAs, please setup a separate community thread.

Best Regards,

Jan